Akira Tamakoshi

According to our database1, Akira Tamakoshi authored at least 8 papers between 2015 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
High-Throughput/Low-Energy MTJ-Based True Random Number Generator Using a Multi-Voltage/Current Converter.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Dual-Port Field-Free SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations under 55-nm CMOS Technology and 1.2-V Supply Voltage.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

Design of an Energy-Efficient True Random Number Generator Based on Triple Read-Write Data-Stream Multiplexing of MTJ Devices.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

2019
A 47.14-µW 200-MHz MOS/MTJ-Hybrid Nonvolatile Microcontroller Unit Embedding STT-MRAM and FPGA for IoT Applications.
IEEE J. Solid State Circuits, 2019

An FPGA-Accelerated Fully Nonvolatile Microcontroller Unit for Sensor-Node Applications in 40nm CMOS/MTJ-Hybrid Technology Achieving 47.14μW Operation at 200MHz.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2017
Sudden Power-Outage Resilient In-Processor Checkpointing for Energy-Harvesting Nonvolatile Processors.
IEEE Trans. Emerg. Top. Comput., 2017

2016
Stochastic behavior-considered VLSI CAD environment for MTJ/MOS-hybrid microprocessor design.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
A sudden power-outage resilient nonvolatile microprocessor for immediate system recovery.
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015


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