Alexey Kupriyanov

According to our database, Alexey Kupriyanov authored at least 12 papers between 2004 and 2009.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2009

Modeling and Efficient Simulation of Complex System-on-a-Chip Architectures (Modellierung und effiziente Simulation von komplexen System-on-a-Chip Architekturen)

Alexey Kupriyanov

PhD thesis, 2009

A holistic approach for tightly coupled reconfigurable parallel processors.

Hritam Dutta, Dmitrij Kissler, Frank Hannig, Alexey Kupriyanov, Jürgen Teich, Bernard Pottier

Microprocess. Microsystems, 2009

2007

Efficient event-driven simulation of parallel processor architectures.

Alexey Kupriyanov, Dmitrij Kissler, Frank Hannig, Jürgen Teich

Proceedings of the 10th International Workshop on Software and Compilers for Embedded Systems, 2007

Massively Parallel Processor Architectures: A Co-design Approach.

Hritam Dutta, Frank Hannig, Alexey Kupriyanov, Dmitrij Kissler, Jürgen Teich, Rainer Schaffer, Sebastian Siegel, Renate Merker, Bernard Pottier

Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007

Modeling of Interconnection Networks in Massively Parallel Processor Architectures.

Alexey Kupriyanov, Frank Hannig, Dmitrij Kissler, Jürgen Teich, Julien Lallet, Olivier Sentieys, Sébastien Pillement

Proceedings of the Architecture of Computing Systems, 2007

2006

A Dynamically Reconfigurable Weakly Programmable Processor Array Architecture Template.

Dmitrij Kissler, Frank Hannig, Alexey Kupriyanov, Jürgen Teich

Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006

An Architecture Description Language for Massively Parallel Processor Architectures.

Alexey Kupriyanov, Frank Hannig, Dmitrij Kissler, Jürgen Teich, Rainer Schaffer, Renate Merker

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2006

Hardware Cost Analysis for Weakly Programmable Processor Arrays.

Dmitrij Kissler, Frank Hannig, Alexey Kupriyanov, Jürgen Teich

Proceedings of the International Symposium on System-on-Chip, 2006

A highly parameterizable parallel processor array architecture.

Dmitrij Kissler, Frank Hannig, Alexey Kupriyanov, Jürgen Teich

Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

A Generic Framework for Rapid Prototyping of System-on-Chip Designs.

Dmitrij Kissler, Alexey Kupriyanov, Frank Hannig, Dirk Koch, Jürgen Teich

Proceedings of the 2006 International Conference on Computer Design & Conference on Computing in Nanotechnology, 2006

2005

Co-Design of Massively Parallel Embedded Processor Architectures.

Frank Hannig, Hritam Dutta, Alexey Kupriyanov, Jürgen Teich, Rainer Schaffer, Sebastian Siegel, Renate Merker, Ronan Keryell, Bernard Pottier, Daniel Chillet, Daniel Ménard, Olivier Sentieys

Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2005

2004

High-Speed Event-Driven RTL Compiled Simulation.

Alexey Kupriyanov, Frank Hannig, Jürgen Teich

Proceedings of the Computer Systems: Architectures, 2004