Andreas Zwinkau

According to our database1, Andreas Zwinkau authored at least 13 papers between 2010 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2018
Resource-aware Programming in a High-level Language - Improved performance with manageable effort on clustered MPSoCs.
PhD thesis, 2018

2016
Invasive computing for timing-predictable stream processing on MPSoCs.
it Inf. Technol., 2016

A memory model for X10.
Proceedings of the 6th ACM SIGPLAN Workshop on X10, 2016

2015
Malleable Invasive Applications.
Proceedings of the Gemeinsamer Tagungsband der Workshops der Tagung Software Engineering 2015, 2015

Cutting out the middleman: OS-level support for x10 activities.
Proceedings of the ACM SIGPLAN Workshop on X10, Portland, OR, USA, June 15 - 17, 2015, 2015

Adaptive fault tolerance through invasive computing.
Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems, 2015

2014
CAP: Communication Aware Programming.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
Invasive computing in HPC with X10.
Proceedings of the third ACM SIGPLAN X10 Workshop, 2013

Simple and Efficient Construction of Static Single Assignment Form.
Proceedings of the Compiler Construction - 22nd International Conference, 2013

2012
AutoTunium: An Evolutionary Tuner for General-Purpose Multicore Applications.
Proceedings of the 18th IEEE International Conference on Parallel and Distributed Systems, 2012

2011
Resource-aware programming and simulation of MPSoC architectures through extension of X10.
Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems, 2011

SSA-Based Register Allocation with PBQP.
Proceedings of the Compiler Construction - 20th International Conference, 2011

2010
Instruction selection by graph transformation.
Proceedings of the 2010 International Conference on Compilers, 2010


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