Ankur Limaye

Orcid: 0000-0001-9406-2584

According to our database1, Ankur Limaye authored at least 24 papers between 2014 and 2025.

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Bibliography

2025
Online Learning for Dynamic Structural Characterization in Electron Energy Loss Spectroscopy.
Proceedings of the Design, Automation & Test in Europe Conference, 2025

The U.S. Microelectronics Research Programs and Where They Lower Barriers to Co-Design. Invited Paper.
Proceedings of the 22nd ACM International Conference on Computing Frontiers: Workshops and Special Sessions, 2025

A Synthesis Methodology for Intelligent Memory Interfaces in Accelerator Systems.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024
To Cache or not to Cache? Exploring the Design Space of Tunable, HLS-generated Accelerators.
Proceedings of the International Symposium on Memory Systems, 2024

Extending High-Level Synthesis with AI/ML Methods.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

Towards Automated Generation of Chiplet-Based Systems Invited Paper.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023
Towards On-Chip Learning for Low Latency Reasoning with End-to-End Synthesis.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022
End-to-End Synthesis of Dynamically Controlled Machine Learning Accelerators.
IEEE Trans. Computers, 2022

Bridging Python to Silicon: The SODA Toolchain.
IEEE Micro, 2022

SODA Synthesizer: An Open-Source, Multi-Level, Modular, Extensible Compiler from High-Level Frameworks to Silicon.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

From High-Level Frameworks to custom Silicon with SODA.
Proceedings of the 2022 IEEE Hot Chips 34 Symposium, 2022

SO(DA)<sup>2</sup>: End-to-end Generation of Specialized Reconfigurable Architectures (Invited Talk).
Proceedings of the 13th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 11th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2022

The SODA approach: leveraging high-level synthesis for hardware/software co-design and hardware specialization: invited.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
Energy characterization of graph workloads.
Sustain. Comput. Informatics Syst., 2021

DOSAGE: Generating Domain-Specific Accelerators for Resource-Constrained Computing.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

Automated Generation of Integrated Digital and Spiking Neuromorphic Machine Learning Accelerators.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Towards Automatic and Agile AI/ML Accelerator Design with End-to-End Synthesis.
Proceedings of the 32nd IEEE International Conference on Application-specific Systems, 2021

2020
ECG-Based Authentication Using Timing-Aware Domain-Specific Architecture.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2019
Bit-Wise and Multi-GPU Implementations of the DNA Recombination Algorithm.
Proceedings of the 26th IEEE International Conference on High Performance Computing, 2019

2018
HERMIT: A Benchmark Suite for the Internet of Medical Things.
IEEE Internet Things J., 2018

A Workload Characterization of the SPEC CPU2017 Benchmark Suite.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2018

2017
A Workload Characterization for the Internet of Medical Things (IoMT).
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

2014
Flipping-based high speed VLSI architecture for 2-D lifting DWT.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Memory efficient VLSI architecture for lifting-based DWT.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014


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