Arnab Kumar Biswas

Orcid: 0000-0002-3057-2478

According to our database1, Arnab Kumar Biswas authored at least 16 papers between 2011 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2022
Using Pattern of On-Off Routers and Links and Router Delays to Protect Network-on-Chip Intellectual Property.
ACM Trans. Comput. Syst., 2022

Protecting Network-on-Chip Intellectual Property Using Timing Channel Fingerprinting.
ACM Trans. Embed. Comput. Syst., 2022

2021
Attacks Toward Wireless Network-on-Chip and Countermeasures.
IEEE Trans. Emerg. Top. Comput., 2021

Cryptographic Software IP Protection without Compromising Performance or Timing Side-channel Leakage.
ACM Trans. Archit. Code Optim., 2021

2020
KLEESpectre: Detecting Information Leakage through Speculative Cache Attacks via Symbolic Execution.
ACM Trans. Softw. Eng. Methodol., 2020

LAMBDA: Lightweight Assessment of Malware for emBeddeD Architectures.
ACM Trans. Embed. Comput. Syst., 2020

Network-on-Chip Intellectual Property Protection Using Circular Path-based Fingerprinting.
ACM J. Emerg. Technol. Comput. Syst., 2020

2018
Efficient Timing Channel Protection for Hybrid (Packet/Circuit-Switched) Network-on-Chip.
IEEE Trans. Parallel Distributed Syst., 2018

A small and adaptive coprocessor for information flow tracking in ARM SoCs.
Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

CIDPro: Custom Instructions for Dynamic Program Diversification.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

A novel lightweight hardware-assisted static instrumentation approach for ARM SoC using debug components.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2018

2017
A Survey of Timing Channels and Countermeasures.
ACM Comput. Surv., 2017

2016
Role based shared memory access control mechanisms in NoC based MP-SoC.
Nano Commun. Networks, 2016

Source Authentication Techniques for Network-on-Chip Router Configuration Packets.
ACM J. Emerg. Technol. Comput. Syst., 2016

2015
Router Attack toward NoC-enabled MPSoC and Monitoring Countermeasures against such Threat.
Circuits Syst. Signal Process., 2015

2011
A Proposed Output Buffer at 90 nm Technology with Minimum Signal Switching Noise at 83.3MHz.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011


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