Ayesha Khalid

According to our database1, Ayesha Khalid authored at least 35 papers between 2011 and 2020.

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Bibliography

2020
An Efficient and Parallel R-LWE Cryptoprocessor.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

Resource-Shared Crypto-Coprocessor of AES Enc/Dec With SHA-3.
IEEE Trans. Circuits Syst., 2020

Pakistani students' perceptions about their learning experience through video games: A qualitative case study.
Libr. Hi Tech, 2020

Agile Scrum Issues at Large-Scale Distributed Projects: Scrum Project Development At Large.
Int. J. Softw. Innov., 2020

AxMM: Area and Power Efficient Approximate Modular Multiplier for R-LWE Cryptosystem.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Secure Algorithm for Rounded Gaussian Sampling.
Proceedings of the Cryptology and Network Security - 19th International Conference, 2020

2019
Optimized Schoolbook Polynomial Multiplication for Compact Lattice-Based Cryptography on FPGA.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Lattice-based Cryptography for IoT in A Quantum World: Are We Ready?
IACR Cryptol. ePrint Arch., 2019

Fault Attack Countermeasures for Error Samplers in Lattice-Based Cryptography.
IACR Cryptol. ePrint Arch., 2019

Using Blockchain for Electronic Health Records.
IEEE Access, 2019

Cloud computing in the quantum era.
Proceedings of the 7th IEEE Conference on Communications and Network Security, 2019

2018
On Practical Discrete Gaussian Samplers for Lattice-Based Cryptography.
IEEE Trans. Computers, 2018

Compact, Scalable, and Efficient Discrete Gaussian Samplers for Lattice-Based Cryptography.
IACR Cryptol. ePrint Arch., 2018

Addressing Side-Channel Vulnerabilities in the Discrete Ziggurat Sampler.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2018

Physical Protection of Lattice-Based Cryptography: Challenges and Solutions.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

Error Samplers for Lattice-Based Cryptography -Challenges, Vulnerabilities and Solutions.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

Lightweight Hardware Implementation of R-LWE Lattice-Based Cryptography.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

2017
RC4-AccSuite: A Hardware Acceleration Suite for RC4-Like Stream Ciphers.
IEEE Trans. Very Large Scale Integr. Syst., 2017

The design space of the number theoretic transform: A survey.
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017

Compact and provably secure lattice-based signatures in hardware.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
RunStream: A High-Level Rapid Prototyping Framework for Stream Ciphers.
ACM Trans. Embed. Comput. Syst., 2016

RunFein: a rapid prototyping framework for Feistel and SPN-based block ciphers.
J. Cryptogr. Eng., 2016

Lattice-based cryptography: From reconfigurable hardware to ASIC.
Proceedings of the International Symposium on Integrated Circuits, 2016

Time-independent discrete Gaussian sampling for post-quantum cryptography.
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

Secure architectures of future emerging cryptography <i>SAFEcrypto</i>.
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

2015
New ASIC/FPGA Cost Estimates for SHA-1 Collisions.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

2014
One Word/Cycle HC-128 Accelerator via State-Splitting Optimization.
Proceedings of the Progress in Cryptology - INDOCRYPT 2014, 2014

2013
Optimized GPU Implementation and Performance Analysis of HC Series of Stream Ciphers.
IACR Cryptol. ePrint Arch., 2013

Designing integrated accelerator for stream ciphers with structural similarities.
Cryptogr. Commun., 2013

RAPID-FeinSPN: A Rapid Prototyping Framework for Feistel and SPN-Based Block Ciphers.
Proceedings of the Information Systems Security - 9th International Conference, 2013

SI-DFA: Sub-expression integrated Deterministic Finite Automata for Deep Packet Inspection.
Proceedings of the IEEE 14th International Conference on High Performance Switching and Routing, 2013

CoARX: a coprocessor for ARX-based cryptographic algorithms.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

New Speed Records for Salsa20 Stream Cipher Using an Autotuning Framework on GPUs.
Proceedings of the Progress in Cryptology, 2013

2012
Designing high-throughput hardware accelerator for stream cipher HC-128.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
HiPAcc-LTE: An Integrated High Performance Accelerator for 3GPP LTE Stream Ciphers.
Proceedings of the Progress in Cryptology - INDOCRYPT 2011, 2011


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