Pascal Cotret

Orcid: 0000-0001-6325-0777

According to our database1, Pascal Cotret authored at least 21 papers between 2010 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
On The Effect of Replacement Policies on The Security of Randomized Cache Architectures.
CoRR, 2023

Gigue: A JIT Code Binary Generator for Hardware Testing.
Proceedings of the 15th ACM SIGPLAN International Workshop on Virtual Machines and Intermediate Languages, 2023

JIT Compiler Security through Low-Cost RISC-V Extension.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

Work in Progress: Thwarting Timing Attacks in Microcontrollers using Fine-grained Hardware Protections.
Proceedings of the IEEE European Symposium on Security and Privacy, 2023

2022
Porting a JIT Compiler to RISC-V: Challenges and Opportunities.
Proceedings of the 19th International Conference on Managed Programming Languages and Runtimes, 2022

2021
Benchmarking Quantized Neural Networks on FPGAs with FINN.
CoRR, 2021

2018
A small and adaptive coprocessor for information flow tracking in ARM SoCs.
Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

A novel lightweight hardware-assisted static instrumentation approach for ARM SoC using debug components.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2018

2017
ARMHEx: A framework for efficient DIFT in real-world SoCs.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

ARMHEx: A hardware extension for DIFT on ARM-based SoCs.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016
Protection of heterogeneous architectures on FPGAs: An approach based on hardware firewalls.
Microprocess. Microsystems, 2016

Hit the KeyJack: stealing data from your daily wireless devices incognito.
CoRR, 2016

Towards a hardware-assisted information flow tracking ecosystem for ARM processors.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

2015
Embedded wavelet-based face recognition under variable position.
Proceedings of the Real-Time Image and Video Processing 2015, 2015

2012
Protection des architectures hétérogènes multiprocesseurs dans les systèmes embarqués : Une approche décentralisée basée sur des pare-feux matériels. (Protection of heterogeneous multiprocessor architectures in embedded systems: A decentralized approach based on hardware firewalls).
PhD thesis, 2012

Security enhancements for FPGA-based MPSoCs: A boot-to-runtime protection flow for an embedded Linux-based system.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012

Lightweight reconfiguration security services for AXI-based MPSoCs.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Bus-based MPSoC Security through Communication Protection: A Latency-efficient Alternative.
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

2011
Distributed Security for Communications and Memories in a Multiprocessor Architecture.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

Efficient key-dependent message authentication in reconfigurable hardware.
Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

2010
HCrypt: A Novel Concept of Crypto-processor with Secured Key Management.
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010


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