Arthur Nieuwoudt
According to our database1,
Arthur Nieuwoudt
authored at least 35 papers
between 2005 and 2020.
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Bibliography
2020
Proc. ACM Comput. Graph. Interact. Tech., 2020
2017
Transistor-level monolithic 3D standard cell layout optimization for full-chip static power integrity.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017
2010
Crosstalk-Induced Delay, Noise, and Interconnect Planarization Implications of Fill Metal in Nanoscale Process Technology.
IEEE Trans. Very Large Scale Integr. Syst., 2010
2009
Numerical Design Optimization Methodology for Wideband and Multi-Band Inductively Degenerated Cascode CMOS Low Noise Amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
Predicting the performance and reliability of future field programmable gate arrays routing architectures with carbon nanotube bundle interconnect.
IET Circuits Devices Syst., 2009
2008
Investigating the Design, Performance, and Reliability of Multi-Walled Carbon Nanotube Interconnect.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Robust reconfigurable filter design using analytic variability quantification techniques.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Impact of dummy filling techniques on interconnect capacitance and planarization in nano-scale process technology.
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008
Automated design of tunable impedance matching networks for reconfigurable wireless applications.
Proceedings of the 45th Design Automation Conference, 2008
2007
Narrow-band low-noise amplifier synthesis for high-performance system-on-chip design.
Microelectron. J., 2007
J. Circuits Syst. Comput., 2007
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
Impact of Process Variations on Carbon Nanotube Bundle Interconnect for Future FPGA Architectures.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
Increasing Manufacturing Yield for Wideband RF CMOS LNAs in the Presence of Process Variations.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
Assessing the Implications of Process Variations on Future Carbon Nanotube Bundle Interconnect Solutions.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
Wavelet-Based Passivity Preserving Model Order Reduction for Wideband Interconnect Characterization.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
Modeling and Design of Ultrawideband Low Noise Amplifiers with Generalized Impedance Matching Networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
Predicting the Performance and Reliability of Carbon Nanotube Bundles for On-Chip Interconnect.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
Reduced-Order Wide-Band Interconnect Model Realization using Filter-Based Spline Interpolation.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Modeling and design challenges and solutions for carbon nanotube-based interconnect in future high performance integrated circuits.
ACM J. Emerg. Technol. Comput. Syst., 2006
Modeling and Evaluating Carbon Nanotube Bundles for Future VLSI Interconnect Applications.
Proceedings of the 1st International ICST Conference on Nano-Networks, 2006
Optimizing Dielectric Strip Plasmonic Waveguides for Subwavelength On-Chip Optical Communication.
Proceedings of the 1st International ICST Conference on Nano-Networks, 2006
Efficient modeling of integrated narrow-band low noise amplifiers for design space exploration.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006
SOC-NLNA: synthesis and optimization for fully integrated narrow-band CMOS low noise amplifiers.
Proceedings of the 43rd Design Automation Conference, 2006
2005
Robust automated synthesis methodology for integrated spiral inductors with variability.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Proceedings of the 42nd Design Automation Conference, 2005
Efficient analytical modeling techniques for rapid integrated spiral inductor prototyping.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005