Yehia Massoud

According to our database1, Yehia Massoud authored at least 102 papers between 1998 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 2015, "For contributions to the modeling and design of nanoscale interconnects".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2015
Parasitic-Aware Design of Integrated DC-DC Converters With Spiral Inductors.
IEEE Trans. VLSI Syst., 2015

A Low-Noise Biopotential Amplifier with an Optimized Noise Efficiency Factor.
Journal of Circuits, Systems, and Computers, 2015

A design methodology for minimizing power loss in integrated DC-DC converter with spiral inductors.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
A Multi-Channel Random Demodulation Reconfigurable Receiver.
IEEE Wireless Commun. Letters, 2014

An efficient real-time FPGA implementation for object detection.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

On the effect of filter variability in compressive sensing systems.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

Multi-channel random demodulation for hardware efficient compressive sensing.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

Robust power converters in integrated systems.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

Accurate and efficient modeling of random demodulation based compressive sensing systems with a general filter.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Analytic modeling of memristor variability for robust memristor systems designs.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

An efficient orthogonal pulse set generator for high-speed sub-GHz UWB communications.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

On the design of RF-DACs for random acquisition based reconfigurable receivers.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Analysis of the inductance and switching frequency trade-off in integrated DC-DC converters.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013
Differential pair sense amplifier for a robust reading scheme for memristor-based memories.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Ultra-low-power high sensitivity spike detectors based on modified nonlinear energy operator.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
An ultra-low-power pseudo-random number generator based on biologically inspired chaotic silicon neuron circuit.
IEICE Electronic Express, 2012

On the effect of width of metallic armchair graphene nanoribbons in plasmonic waveguide applications.
Proceedings of the 7th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2012

On the design of subwavelength waveguiding structures for terahertz Applications.
Proceedings of the 7th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2012

Implementation of a subwavelength Bragg reflector for Terahertz applications.
Proceedings of the 7th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2012

Compressive sensing based classification of intramuscular electromyographic signals.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A low-power low-noise bioamplifier for multielectrode neural recording systems.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A memristor-based random modulator for compressive sensing systems.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
A low-loss rectifier unit for inductive-powering of biomedical implants.
Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011

Automated Nuclear Segmentation of Coherent Anti-Stokes Raman Scattering Microscopy Images by Coupling Superpixel Context Information with Artificial Neural Networks.
Proceedings of the Machine Learning in Medical Imaging - Second International Workshop, 2011

Performance analysis of random demodulators with M-sequences and Kasami sequences.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

A random demodulator with a software-based integrator resetting scheme.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Power-loss reduction of a MOSFET cross-coupled rectifier by employing zero-voltage switching.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Robust power oscillator design for inductive-power link applications.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Analytical modeling and design of ring shaped piezoelectric transducers.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Design of a scalable DNA shearing system using phased-array ultrasonic transducer.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

On the design of balanced carbon nanotube field-effect transistor gates.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2010
Crosstalk-Induced Delay, Noise, and Interconnect Planarization Implications of Fill Metal in Nanoscale Process Technology.
IEEE Trans. VLSI Syst., 2010

Guest Editorial Special Issue on ISCAS 2009.
IEEE Trans. on Circuits and Systems, 2010

2009
Design of Thermally Robust Clock Trees Using Dynamically Adaptive Clock Buffers.
IEEE Trans. on Circuits and Systems, 2009

Numerical Design Optimization Methodology for Wideband and Multi-Band Inductively Degenerated Cascode CMOS Low Noise Amplifiers.
IEEE Trans. on Circuits and Systems, 2009

Predicting the performance and reliability of future field programmable gate arrays routing architectures with carbon nanotube bundle interconnect.
IET Circuits, Devices & Systems, 2009

2008
Accurate Analytical Modeling of Frequency Dependent Loop Self-inductance.
Journal of Circuits, Systems, and Computers, 2008

Dynamic voltage Scaling Continuous Adaptive-Size Cell Design Technique.
Journal of Circuits, Systems, and Computers, 2008

On the tapering Factor for Wide-Band Cascaded amplifiers.
Journal of Circuits, Systems, and Computers, 2008

Investigating the Design, Performance, and Reliability of Multi-Walled Carbon Nanotube Interconnect.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

Investigating the Impact of Fill Metal on Crosstalk-Induced Delay and Noise.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

On the feasibility of hardware implementation of sub-Nyquist random-sampling based analog-to-information conversion.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Analytical modeling of common-gate low noise amplifiers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Performance analysis of optimized carbon nanotube interconnect.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Accurate analytical delay modeling of CMOS clock buffers considering power supply variations.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Power-supply-variation-aware timing analysis of synchronous systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Robust wide range of supply-voltage operation using continuous adaptive size-ratio gates.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A fault-aware dynamic routing algorithm for on-chip networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

An Analytical model for characteristic impedance in nanostrip plasmonic waveguides.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

On the modeling of resistance in graphene nanoribbon (GNR) for future interconnect applications.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

Robust reconfigurable filter design using analytic variability quantification techniques.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

Impact of dummy filling techniques on interconnect capacitance and planarization in nano-scale process technology.
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

On the design of customizable low-voltage common-gate LNA-mixer pair using current and charge reusing techniques.
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

Automated design of tunable impedance matching networks for reconfigurable wireless applications.
Proceedings of the 45th Design Automation Conference, 2008

2007
Narrow-band low-noise amplifier synthesis for high-performance system-on-chip design.
Microelectronics Journal, 2007

A Methodology for the Estimation of Capacitive Crosstalk-Induced Short-Circuit Energy.
Journal of Circuits, Systems, and Computers, 2007

Efficient Multi-Shifted Arnoldi Projection Using Wavelet Transform.
Journal of Circuits, Systems, and Computers, 2007

Implementing DSP Algorithms with On-Chip Networks.
Proceedings of the First International Symposium on Networks-on-Chips, 2007

Systematic Design Optimization Methodology for Multi-Band CMOS Low Noise Amplifiers.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

Impact of Process Variations on Carbon Nanotube Bundle Interconnect for Future FPGA Architectures.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

Increasing Manufacturing Yield for Wideband RF CMOS LNAs in the Presence of Process Variations.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Assessing the Implications of Process Variations on Future Carbon Nanotube Bundle Interconnect Solutions.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Provisioning On-Chip Networks under Buffered RC Interconnect Delay Variations.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Mitigating Thermal Effects on Clock Skew with Dynamically Adaptive Drivers.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Parameter-Variation-Aware Analysis for Noise Robustness.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Wavelet-Based Passivity Preserving Model Order Reduction for Wideband Interconnect Characterization.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Modeling and Design of Ultrawideband Low Noise Amplifiers with Generalized Impedance Matching Networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Estimation of Capacitive Crosstalk-Induced Short-Circuit Energy.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Variability-Aware Synthesis for Wideband Low Noise Amplifiers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Theory and Implementation of an Analog-to-Information Converter using Random Demodulation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Subwavelength Plasmonic Bragg Reflector Structures for On-chip Optoelectronic Applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Wavelet-Based Interpolation Point Selection for Multi-Shifted Arnoldi.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Thermally robust clocking schemes for 3D integrated circuits.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Assessing carbon nanotube bundle interconnect for future FPGA architectures.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Hierarchical Optimization Methodology for Wideband Low Noise Amplifiers.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

Predicting the Performance and Reliability of Carbon Nanotube Bundles for On-Chip Interconnect.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

Reduced-Order Wide-Band Interconnect Model Realization using Filter-Based Spline Interpolation.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

Frequency Selective Model Order Reduction via Spectral Zero Projection.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006
Accurate Loop Self Inductance Bound for Efficient Inductance Screening.
IEEE Trans. VLSI Syst., 2006

Accurate modeling of substrate resistive coupling for floating substrates.
ACM Trans. Design Autom. Electr. Syst., 2006

Adaptive Ratio-Size Gates for Minimum-Energy Operation.
IEEE Trans. on Circuits and Systems, 2006

Variability-Aware Multilevel Integrated Spiral Inductor Synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2006

Modeling and design challenges and solutions for carbon nanotube-based interconnect in future high performance integrated circuits.
JETC, 2006

Reliability Analysis for On-chip Networks under RC Interconnect Delay Variation.
Proceedings of the 1st International ICST Conference on Nano-Networks, 2006

Modeling and Evaluating Carbon Nanotube Bundles for Future VLSI Interconnect Applications.
Proceedings of the 1st International ICST Conference on Nano-Networks, 2006

Optimizing Dielectric Strip Plasmonic Waveguides for Subwavelength On-Chip Optical Communication.
Proceedings of the 1st International ICST Conference on Nano-Networks, 2006

Efficient modeling of integrated narrow-band low noise amplifiers for design space exploration.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

An integrated circuit/behavioral simulation framework for continuous-time sigma-delta ADCs.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

SOC-NLNA: synthesis and optimization for fully integrated narrow-band CMOS low noise amplifiers.
Proceedings of the 43rd Design Automation Conference, 2006

2005
Robust automated synthesis methodology for integrated spiral inductors with variability.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Reducing pessimism in RLC delay estimation using an accurate analytical frequency dependent model for inductance.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Multi-level approach for integrated spiral inductor optimization.
Proceedings of the 42nd Design Automation Conference, 2005

Efficient analytical modeling techniques for rapid integrated spiral inductor prototyping.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2003
On the Accuracy of Return Path Assumption for Loop Inductance Extraction for 0.1?m Technology and Beyond.
Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

2002
Simulation and modeling of the effect of substrate conductivity on coupling inductance and circuit crosstalk.
IEEE Trans. VLSI Syst., 2002

Managing on-chip inductive effects.
IEEE Trans. VLSI Syst., 2002

FastMag: a 3-D magnetostatic inductance extraction program for structures with permeable materials.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

Improving the generality of the fictitious magnetic charge approach to computing inductances in the presence of permeable materials.
Proceedings of the 39th Design Automation Conference, 2002

2001
Modeling and Analysis of Differential Signaling for Minimizing Inductive Cross-Talk.
Proceedings of the 38th Design Automation Conference, 2001

1999
Simulation algorithms for inductive effects.
PhD thesis, 1999

Interconnect Analysis: From 3-D Structures to Circuit Models.
Proceedings of the 36th Conference on Design Automation, 1999

1998
Layout Techniques for Minimizing On-Chip Interconnect Self Inductance.
Proceedings of the 35th Conference on Design Automation, 1998


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