Zhongkai Wang

Orcid: 0009-0006-5622-5366

According to our database1, Zhongkai Wang authored at least 21 papers between 2015 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Study on Optimization of Maintenance Line Operation Scheme Considering the Layout of EMU Depot.
Proceedings of the 2023 7th International Conference on Innovation in Artificial Intelligence, 2023

2022
An Output Bandwidth Optimized 200-Gb/s PAM-4 100-Gb/s NRZ Transmitter With 5-Tap FFE in 28-nm CMOS.
IEEE J. Solid State Circuits, 2022

An Eight-Core 1.44-GHz RISC-V Vector Processor in 16-nm FinFET.
IEEE J. Solid State Circuits, 2022

A 200Gb/s PAM-4 Transmitter with Hybrid Sub-Sampling PLL in 28nm CMOS Technology.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
LAYGO: A Template-and-Grid-Based Layout Generation Engine for Advanced CMOS Technologies.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

4.3 An Eight-Core 1.44GHz RISC-V Vector Machine in 16nm FinFET.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

8 An Output-Bandwidth-Optimized 200Gb/s PAM-4 100Gb/s NRZ Transmitter with 5-Tap FFE in 28nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

Optimization Model for Collaborative Overhaul Workshop Scheduling Problem of Multiple EMUs.
Proceedings of the 2021 IEEE 23rd Int Conf on High Performance Computing & Communications; 7th Int Conf on Data Science & Systems; 19th Int Conf on Smart City; 7th Int Conf on Dependability in Sensor, 2021

Optimized Model and Algorithm for Scheduling Turnaround Routes of Electric Multiple Units.
Proceedings of the 2021 IEEE 23rd Int Conf on High Performance Computing & Communications; 7th Int Conf on Data Science & Systems; 19th Int Conf on Smart City; 7th Int Conf on Dependability in Sensor, 2021

An Automated and Process-Portable Generator for Phase-Locked Loop.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2019
A Real-Time, 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET.
IEEE J. Solid State Circuits, 2019

A Mixed-Signal RISC-V Signal Analysis SoC Generator With a 16-nm FinFET Instance.
IEEE J. Solid State Circuits, 2019

A Generated 7GS/s 8b Time-Interleaved SAR ADC with 38.2dB SNDR at Nyquist in 16nm CMOS FinFET.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2018
Optimizing the High-Level Maintenance Planning Problem of the Electric Multiple Unit Train Using a Modified Particle Swarm Optimization Algorithm.
Symmetry, 2018

A Real-Time, Analog/Digital Co-Designed 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018

BAG2: A process-portable framework for generator-based AMS circuit design.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018


2016
A 25 Gb/s Hybrid-Integrated Silicon Photonic Source-Synchronous Receiver With Microring Wavelength Stabilization.
IEEE J. Solid State Circuits, 2016

2015
25Gb/s hybrid-integrated silicon photonic receiver with microring wavelength stabilization.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015

22.4 A 24Gb/s 0.71pJ/b Si-photonic source-synchronous receiver with adaptive equalization and microring wavelength stabilization.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015


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