Bart D. Theelen

According to our database1, Bart D. Theelen authored at least 33 papers between 2002 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

Homepage:

On csauthors.net:

Bibliography

2017
Performance Analysis of Weakly-Consistent Scenario-Aware Dataflow Graphs.
Signal Processing Systems, 2017

Analyzing execution traces: critical-path analysis and distance analysis.
STTT, 2017

2016
Dataflow-based modeling and performance analysis for online gesture recognition.
Proceedings of the 2016 2nd International Workshop on Modelling, 2016

2015
Uniting Academic Achievements on Performance Analysis with Industrial Needs.
Proceedings of the Quantitative Evaluation of Systems, 12th International Conference, 2015

2014
Performance analysis of weakly-consistent scenario-aware dataflow graphs.
Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014

2013

Fast Multiprocessor Scheduling with Fixed Task Binding of Large Scale Industrial Cyber Physical Systems.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012
Model checking of Scenario-Aware Dataflow with CADP.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

2011
Scenario-aware dataflow: Modeling, analysis and implementation of dynamic applications.
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

Performance Model Checking Scenario-Aware Dataflow.
Proceedings of the Formal Modeling and Analysis of Timed Systems, 2011

Predicting Timing Performance of Advanced Mechatronics Control Systems.
Proceedings of the Workshop Proceedings of the 35th Annual IEEE International Computer Software and Applications Conference, 2011

2010
UPPAAL in Practice: Quantitative Verification of a RapidIO Network.
Proceedings of the Leveraging Applications of Formal Methods, Verification, and Validation, 2010

A predictable communication assist.
Proceedings of the 7th Conference on Computing Frontiers, 2010

From POOSL to UPPAAL: Transformation and Quantitative Analysis.
Proceedings of the 10th International Conference on Application of Concurrency to System Design, 2010

2009
Patterns for Automatic Generation of Soft Real-time System Models.
Simulation, 2009

2008
Resource-efficient routing and scheduling of time-constrained streaming communication on networks-on-chip.
Journal of Systems Architecture - Embedded Systems Design, 2008

Analyzing composability of applications on MPSoC platforms.
Journal of Systems Architecture - Embedded Systems Design, 2008

Performance Model Generation for MPSoC Design-Space Exploration.
Proceedings of the Fifth International Conference on the Quantitative Evaluaiton of Systems (QEST 2008), 2008

2007
An Algebra of Pareto Points.
Fundam. Inform., 2007

A Performance Analysis Tool for Scenario-Aware Streaming Applications.
Proceedings of the Fourth International Conference on the Quantitative Evaluaiton of Systems (QEST 2007), 2007

Software/Hardware Engineering with the Parallel Object-Oriented Specification Language.
Proceedings of the 5th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2007), May 30, 2007

Latency Minimization for Synchronous Data Flow Graphs.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

A Probabilistic Approach to Model Resource Contention for Performance Estimation of Multi-featured Media Devices.
Proceedings of the 44th Design Automation Conference, 2007

2006
A scenario-aware data flow model for combined long-run average and worst-case performance analysis.
Proceedings of the 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 2006

Liveness and Boundedness of Synchronous Data Flow Graphs.
Proceedings of the Formal Methods in Computer-Aided Design, 6th International Conference, 2006

Resource Manager for Non-preemptive Heterogeneous Multiprocessor System-on-chip.
Proceedings of the 2006 4th Workshop on Embedded Systems for Real-Time Multimedia, 2006

Resource-Efficient Routing and Scheduling of Time-Constrained Network-on-Chip Communication.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Throughput Analysis of Synchronous Data Flow Graphs.
Proceedings of the Sixth International Conference on Application of Concurrency to System Design (ACSD 2006), 2006

2005
An Algebra of Pareto Points.
Proceedings of the Fifth International Conference on Application of Concurrency to System Design (ACSD 2005), 2005

2003
A scalable single-chip multi-processor architecture with on-chip RTOS kernel.
Journal of Systems Architecture, 2003

Performance modelling of a network processor using POOSL.
Computer Networks, 2003

2002
Concurrent Support of Higher-Layer Protocols over WDM.
Photonic Network Communications, 2002

Architecture Design of a Scalable Single-Chip Multi-Processor.
Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002


  Loading...