Bibhudatta Sahoo
Orcid: 0000-0002-3563-9096Affiliations:
- Indian Institute of Technology Kharagpur, Department of Electronics and Electrical Communication Engineering, Kharagpur, India (since 2017)
- University of Illinois at Urbana-Champaign, IL, USA (2016 - 2017)
- Amrita University, Department of Electronics and Communication Engineering, Amiratapuri, India (2012 - 2016)
- University of California, Los Angeles, CA, USA (PhD 2009)
- Broadcom, Irvine, CA, USA (2000 - 2007)
- University of Minnesota-Twin Cities, Minneapolis, MN, USA (1998 - 2000)
- Indian Institute of Technology, Kharagpur, India (1994 - 1998)
According to our database1,
Bibhudatta Sahoo
authored at least 45 papers
between 2000 and 2025.
Collaborative distances:
Collaborative distances:
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Bibliography
2025
Voltage-Controlled Oscillator and Memristor-Based Analog Computing for Solving Systems of Linear Equations.
CoRR, June, 2025
Breaking the Barriers of One-to-One Usage of Implicit Neural Representation in Image Compression: A Linear Combination Approach With Performance Guarantees.
IEEE Internet Things J., April, 2025
Variable Resolution Pixel Quantization for Low Power Machine Vision Application on Edge.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2025
An 8-bit Split CDAC-Based Noise-Shaping SAR ADC in 180 nm CMOS for Power Efficient Digitization of Sensor Signals.
IEEE Trans. Instrum. Meas., 2025
Proceedings of the 43rd IEEE VLSI Test Symposium, 2025
2024
Energy Efficient Resistor-Transconductor Hybrid-Based Full-Duplex Transceiver for Serial Link.
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2024
SpikePipe: Accelerated Training of Spiking Neural Networks via Inter-Layer Pipelining and Multiprocessor Scheduling.
CoRR, 2024
Closed Form Expression of Input Matching of a Wideband Single-Ended to Differential LNA.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024
Systematic Design of Ring VCO-Based SNN - Translating Training Parameters to Circuits -.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024
2023
Generalized Sampling-Based Multi-Channel Sampling of Signals Realized With Pure Delay Analog Filters and Digital FIR Reconstruction Filters.
IEEE Trans. Circuits Syst. II Express Briefs, September, 2023
Transition Point Estimation Using RC-Filtered Square Wave for Calibration of SAR ADC.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2023
Energy-Efficient FPGA Implementation of Power-of-2 Weights-Based Convolutional Neural Networks With Low Bit-Precision Input Images.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2023
Johnson Counter-Based Multiphase Generation for VCO-Based ADC for Direct Digitization of Low Amplitude Sensor Signals.
IEEE Trans. Instrum. Meas., 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2023
2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
Closed-Form Expression for the Combined Effect of Offset, Gain, Timing, and Bandwidth Mismatch in Time-Interleaved ADCs Using Generalized Sampling.
IEEE Trans. Instrum. Meas., 2021
Performance Limits of Generalized Sampling Based 2-Channel Analog-to-Digital Converter.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
Comparison of Real-Valued FFT Architectures for Low-Throughput Applications using FPGA.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
2020
A Low-Power Reconfigurable Narrowband/Wideband LNA for Cognitive Radio-Wireless Sensor Network.
IEEE Trans. Very Large Scale Integr. Syst., 2020
Deterministic Dither Based Mismatch Characterization of Wide Range of Metal-Oxide-Metal Capacitors.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
IEEE Trans. Circuits Syst. II Express Briefs, 2019
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
A Systematic Approach to Sizing Capacitors in Split-SAR ADC to Achieve Optimum Redundancy.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
2018
IEEE Trans. Very Large Scale Integr. Syst., 2018
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
Mitigating Aperture Error in Pipelined ADCs Without a Front-end Sample-and-Hold Amplfier.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
2017
IEEE Trans. Very Large Scale Integr. Syst., 2017
Analysis and Design of Single Reference Reduced Summer Loading-Based Switched Capacitor DFE.
Circuits Syst. Signal Process., 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
A 45-75MHz 197-452µW oscillator with 164.6dB FoM and 2.3psrms period jitter in 65nm CMOS.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
2016
IEEE Trans. Circuits Syst. II Express Briefs, 2016
Bootstrapped leakage suppression switch for switched capacitor circuits with zero input common mode.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016
2003
2000
Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000