Bowen Liu

Orcid: 0000-0002-4194-8119

Affiliations:
  • Zoom, Inc., San Jose, CA, USA
  • University of Michigan, Department of Electrical and Computer Engineering, Ann Arbor, MI, USA (PhD 2024)


According to our database1, Bowen Liu authored at least 14 papers between 2020 and 2025.

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Bibliography

2025
H-PCC: Point Cloud Compression With Hybrid Mode Selection and Content Adaptive Down-Sampling.
IEEE Robotics Autom. Lett., April, 2025

2024
AIMMI: Audio and Image Multi-Modal Intelligence via a Low-Power SoC With 2-MByte On-Chip MRAM for IoT Devices.
IEEE J. Solid State Circuits, October, 2024

Diffusion-Aided Joint Source Channel Coding For High Realism Wireless Image Transmission.
CoRR, 2024

VCISR: Blind Single Image Super-Resolution with Video Compression Synthetic Data.
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2024

2023
MMVC: Learned Multi-Mode Video Compression with Block-based Prediction Mode Selection and Density-Adaptive Entropy Coding.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023

2022
Audio and Image Cross-Modal Intelligence via a 10TOPS/W 22nm SoC with Back-Propagation and Dynamic Power Gating.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

An End-to-End Deep Learning Framework For Multiple Audio Source Separation And Localization.
Proceedings of the IEEE International Conference on Acoustics, 2022

2021
RRAM-DNN: An RRAM and Model-Compression Empowered All-Weights-On-Chip DNN Accelerator.
IEEE J. Solid State Circuits, 2021

An Ultra-Low-Power Image Signal Processor for Hierarchical Image Recognition With Deep Neural Networks.
IEEE J. Solid State Circuits, 2021

HTNN: Deep Learning in Heterogeneous Transform Domains with Sparse-Orthogonal Weights.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

Deep Learning in Latent Space for Video Prediction and Compression.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2021

2020
A 170μW Image Signal Processor Enabling Hierarchical Image Recognition for Intelligence at the Edge.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

AA-ResNet: Energy Efficient All-Analog ResNet Accelerator.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Unified Signal Compression Using Generative Adversarial Networks.
Proceedings of the 2020 IEEE International Conference on Acoustics, 2020


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