Bruna Cardoso Paz

According to our database1, Bruna Cardoso Paz authored at least 7 papers between 2013 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2023
Transport characterization of CMOS-based devices fabricated with isotopically-enriched <sup>28</sup>Si for spin qubit applications.
Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023

2022

Coupling control in the few-electron regime of quantum dot arrays using 2-metal gate levels in CMOS technology.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2017
Harmonic distortion analysis of triple gate SOI nanowire MOSFETS down to 100 K.
Microelectron. Reliab., 2017

2016
Drain current model for short-channel triple gate junctionless nanowire transistors.
Microelectron. Reliab., 2016

Analog performance of strained SOI nanowires down to 10K.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

2013
Asymmetric channel doping profile and temperature reduction influence on the performance of current mirrors implemented with FD SOI nMOSFETs.
Microelectron. Reliab., 2013


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