Byungho Yook

According to our database, Byungho Yook authored at least 2 papers between 2023 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

A 4.13-GHz UHS Pseudo Two-Port SRAM With BL Charge Time Reduction and Flying Word-Line for HPC Applications in 4-nm FinFET Technology.

Jeongkyun Kim, Byungho Yook, Youngo Lee, Taemin Choi, Kyuwon Choi, Chanho Lee, Juchang Lee, Hyeongcheol Kim, Seok Yun, Changhoon Do, Minwoo Kwak, Mijoung Kim, Yunrong Li, Hoyoung Tang, Jaeyoung Kim, Inhak Lee, Dongwook Seo, Sangyeop Baeck

IEEE J. Solid State Circuits, April, 2024

2023

A 4.0GHz UHS Pseudo Two-port SRAM with BL Charge Time Reduction and Flying Word-Line for HPC Applications in 4nm FinFET Technology.

Jeongkyun Kim, Byungho Yook, Taemin Choi, Kyuwon Choi, Chanho Lee, Yunrong Li, Youngo Lee, Seok Yun, Changhoon Do, Hoyoung Tang, Inhak Lee, Dongwook Seo, Sangyeop Baeck

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023