Taemin Choi

According to our database1, Taemin Choi authored at least 5 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A 4.13-GHz UHS Pseudo Two-Port SRAM With BL Charge Time Reduction and Flying Word-Line for HPC Applications in 4-nm FinFET Technology.
IEEE J. Solid State Circuits, April, 2024

2023
A 4.0GHz UHS Pseudo Two-port SRAM with BL Charge Time Reduction and Flying Word-Line for HPC Applications in 4nm FinFET Technology.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2022
SRAM Write- and Performance-Assist Cells for Reducing Interconnect Resistance Effects Increased With Technology Scaling.
IEEE J. Solid State Circuits, 2022

2021
SRAM Write- and Performance-Assist Cells for Reducing Interconnect Resistance Effects Increased with Technology Scaling.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

2018
Determination of Local Goal for a Mobile Robot with Sporadic Human Commands of Tele-Operation.
Proceedings of the 27th IEEE International Symposium on Robot and Human Interactive Communication, 2018


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