Chi-Shuen Lee

According to our database, Chi-Shuen Lee authored at least 4 papers between 2013 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Device-to-System Performance Evaluation: from Transistor/Interconnect Modeling to VLSI Physical Design and Neural-Network Predictor.

Chi-Shuen Lee, Brian Cline, Saurabh Sinha, Greg Yeric, H.-S. Philip Wong

CoRR, 2021

2015

Rapid Co-Optimization of Processing and Circuit Design to Overcome Carbon Nanotube Variations.

Gage Hills, Jie Zhang, Max Marcel Shulaker, Hai Wei, Chi-Shuen Lee, Arjun Balasingam, H.-S. Philip Wong, Subhasish Mitra

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Energy-Efficient Abundant-Data Computing: The N3XT 1, 000x.

Mohamed M. Sabry, Mingyu Gao, Gage Hills, Chi-Shuen Lee, Greg Pitner, Max M. Shulaker, Tony F. Wu, Mehdi Asheghi, Jeffrey Bokor, Franz Franchetti, Kenneth E. Goodson, Christos Kozyrakis, Igor L. Markov, Kunle Olukotun, Larry T. Pileggi, Eric Pop, Jan M. Rabaey, Christopher Ré, H.-S. Philip Wong, Subhasish Mitra

Computer, 2015

2013

Carbon nanotube circuits: opportunities and challenges.

Hai Wei, Max M. Shulaker, Gage Hills, Hong-Yu Chen, Chi-Shuen Lee, Luckshitha Liyanage, Jie Zhang, H.-S. Philip Wong, Subhasish Mitra

Proceedings of the Design, Automation and Test in Europe, 2013