Chia-Lin Hu

According to our database1, Chia-Lin Hu authored at least 7 papers between 2007 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2023
On Automating Finger-Cap Array Synthesis with Optimal Parasitic Matching for Custom SAR ADC.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022
An 1-bit by 1-bit High Parallelism In-RRAM Macro with Co-Training Mechanism for DCNN Applications.
Proceedings of the 2022 International Symposium on VLSI Design, Automation and Test, 2022

On Optimizing Capacitor Array Design for Advanced Node SAR ADC.
Proceedings of the 18th International Conference on Synthesis, 2022

2021
A Reconfigurable In-SRAM Computing Architecture for DCNN Applications.
Proceedings of the International Symposium on VLSI Design, Automation and Test, 2021

2020
On EDA Solutions for Reconfigurable Memory-Centric AI Edge Applications.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2008
A reconfigurable MAC architecture implemented with mixed-Vt standard cell library.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
Mixed-VTH (MVT) CMOS circuit design for low power cell libraries.
Proceedings of the 2007 IEEE International SOC Conference, 2007


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