Ching-Yuan Chen

According to our database, Ching-Yuan Chen authored at least 13 papers between 2019 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Functional Test Generation for AI Accelerators using Bayesian Optimization^∗.

Arjun Chaudhuri, Ching-Yuan Chen, Jonti Talukdar, Krishnendu Chakrabarty

Proceedings of the 41st IEEE VLSI Test Symposium, 2023

Attacking Memristor-Mapped Graph Neural Network by Inducing Slow-to-Write Errors.

Ching-Yuan Chen, Biresh Kumar Joardar, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty

Proceedings of the IEEE European Test Symposium, 2023

2022

Efficient Identification of Critical Faults in Memristor-Based Inferencing Accelerators.

Ching-Yuan Chen, Krishnendu Chakrabarty

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2021

Design of a Bone-Guided Cochlear Implant Microsystem With Monopolar Biphasic Multiple Stimulations and Evoked Compound Action Potential Acquisition and Its In Vivo Verification.

Sung-Hao Wang, Yu-Kai Huang, Ching-Yuan Chen, Li-Yang Tang, Yen-Fu Tu, Po-Chih Chang, Chia-Fone Lee, Chia-Hsiang Yang, Chung-Chih Hung, Chien-Hao Liu, Ming-Dou Ker, Chung-Yu Wu

IEEE J. Solid State Circuits, 2021

On-line Functional Testing of Memristor-mapped Deep Neural Networks using Backdoored Checksums.

Ching-Yuan Chen, Krishnendu Chakrabarty

Proceedings of the IEEE International Test Conference, 2021

Efficient Fault-Criticality Analysis for AI Accelerators using a Neural Twin^∗.

Arjun Chaudhuri, Ching-Yuan Chen, Jonti Talukdar, Siddarth Madala, Abhishek Kumar Dubey, Krishnendu Chakrabarty

Proceedings of the IEEE International Test Conference, 2021

Efficient Identification of Critical Faults in Memristor Crossbars for Deep Neural Networks.

Ching-Yuan Chen, Krishnendu Chakrabarty

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Pruning of Deep Neural Networks for Fault-Tolerant Memristor-based Accelerators.

Ching-Yuan Chen, Krishnendu Chakrabarty

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

Functional-Like Transition Delay Fault Test-Pattern Generation using a Bayesian-Based Circuit Model.

Ching-Yuan Chen, Ching-Hong Cheng, Jiun-Lang Huang, Krishnendu Chakrabarty

Proceedings of the IEEE European Test Symposium, 2020

Improved Design and In Vivo Animal Tests of Bone-Guided Cochlear Implant Microsystem with Monopolar Biphasic Multiple Stimulation and Neural Action Potential Acquisition.

Sung-Hao Wang, Yu-Kai Huang, Ching-Yuan Chen, Chia-Fone Lee, Chia-Hsiang Yang, Chung-Chih Hung, Chien-Hao Liu, Ming-Dou Ker, Chung-Yu Wu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020

2019

Potential Usefulness of Single Photon Emission Computed Tomography/Computed Tomography in Management of Patients with Failed Back Surgery Syndrome.

Bor-Ren Huang, Bing-Ru Peng, Lung-Kwang Pan, Ching-Yuan Chen

J. Medical Imaging Health Informatics, 2019

Testability Measures Considering Circuit Reconvergence to Reduce ATPG Runtime.

Kai-Hsun Chen, Ching-Yuan Chen, Jiun-Lang Huang

Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019

Reinforcement-Learning-Based Test Program Generation for Software-Based Self-Test.

Ching-Yuan Chen, Jiun-Lang Huang

Proceedings of the 28th IEEE Asian Test Symposium, 2019