Dai Nakamura

According to our database, Dai Nakamura authored at least 6 papers between 2008 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

A 1Tb 3b/Cell 3D-Flash Memory of more than 17Gb/mm² bit density with 3.2Gbps interface and 205MB/s program throughput.

Mario Sako, T. Nakajima, Fumihiro Kono, T. Nakano, Masaki Fujiu, Junji Musha, Dai Nakamura, Naoaki Kanagawa, Y. Shimizu, Kosuke Yanagidaira, Tetsuaki Utsumi, T. Kawano, Yoshikazu Hosomura, Hiroki Yabe, M. Kano, Hiroshi Sugawara, A. H. Sravan, K. Hayashi, Toshiyuki Kouchi, Y. Watanabe

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2020

A 1.33-Tb 4-Bit/Cell 3-D Flash Memory on a 96-Word-Line-Layer Technology.

Noboru Shibata, Takahisa Kawabe, Taira Shibuya, Mario Sako, Kosuke Yanagidaira, Toshifumi Hashimoto, Hiroki Date, Manabu Sato, Tomoki Nakagawa, Junji Musha, Takatoshi Minamoto, Kazushige Kanda, Mizuki Uda, Dai Nakamura, Katsuaki Sakurai, Takahiro Yamashita, Jieyun Zhou, Ryoichi Tachibana, Teruo Takagiwa, Takahiro Sugimoto, Masatsugu Ogawa, Yusuke Ochi, Takahiro Shimizu, Kazuaki Kawaguchi, Masatsugu Kojima, Takeshi Ogawa, Tomoharu Hashiguchi, Ryo Fukuda, Masami Masuda, Koichi Kawakami, Tadashi Someya, Yasuyuki Kajitani, Yuuki Matsumoto, Jun Nakai, Jumpei Sato, Namasivayam Raghunathan, Yee Lih Koh, Shuo Chen, Juan Lee, Hiroaki Nasu, Hiroshi Sugawara, Koji Hosono, Toshiki Hisada, Hiroshi Nakamura, Osamu Nagao, Naoki Kobayashi, Makoto Miakashi, Yasushi Nagadomi, Tomoaki Nakano

IEEE J. Solid State Circuits, 2020

2019

A 1.33Tb 4-bit/Cell 3D-Flash Memory on a 96-Word-Line-Layer Technology.

Noboru Shibata, Kazushige Kanda, Takahiro Shimizu, Jun Nakai, Osamu Nagao, Naoki Kobayashi, Makoto Miakashi, Yasushi Nagadomi, Takeshi Nakano, Takahisa Kawabe, Taira Shibuya, Mario Sako, Kosuke Yanagidaira, Toshifumi Hashimoto, Hiroki Date, Manabu Sato, Tomoki Nakagawa, H. Takamoto, Junji Musha, Takatoshi Minamoto, Mizuki Uda, Dai Nakamura, Katsuaki Sakurai, Takahiro Yamashita, Jieyun Zhou, Ryoichi Tachibana, Teruo Takagiwa, Takahiro Sugimoto, Mikio Ogawa, Yusuke Ochi, Kazuaki Kawaguchi, Masatsugu Kojima, Takeshi Ogawa, Tomoharu Hashiguchi, Ryo Fukuda, Masami Masuda, Koichi Kawakami, Tadashi Someya, Yasuyuki Kajitani, Yuuki Matsumoto, Naohito Morozumi, Jumpei Sato, Namas Raghunathan, Yee Lih Koh, Shuo Chen, Juan Lee, Hiroaki Nasu, Hiroshi Sugawara, Koji Hosono, Toshiki Hisada, T. Kaneko, Hiroshi Nakamura

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2012

A 151-mm² 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS Technology.

Koichi Fukuda, Yoshihisa Watanabe, Eiichi Makino, Koichi Kawakami, Jumpei Sato, Teruo Takagiwa, Naoaki Kanagawa, Hitoshi Shiga, Naoya Tokiwa, Yoshihiko Shindo, Takeshi Ogawa, Toshiaki Edahiro, Makoto Iwai, Osamu Nagao, Junji Musha, Takatoshi Minamoto, Yuka Furuta, Kosuke Yanagidaira, Yuya Suzuki, Dai Nakamura, Yoshikazu Hosomura, Rieko Tanaka, Hiromitsu Komai, Mai Muramoto, Go Shikata, Ayako Yuminaka, Kiyofumi Sakurai, Manabu Sakai, Hong Ding, Mitsuyuki Watanabe, Yosuke Kato, Toru Miwa, Alex Mak, Masaru Nakamichi, Gertjan Hemink, Dana Lee, Masaaki Higashitani, Brian Murphy, Bo Lei, Yasuhiko Matsunaga, Kiyomi Naruke, Takahiko Hara

IEEE J. Solid State Circuits, 2012

2011

A 151mm² 64Gb MLC NAND flash memory in 24nm CMOS technology.

Koichi Fukuda, Yoshihisa Watanabe, Eiichi Makino, Koichi Kawakami, Jumpei Sato, Teruo Takagiwa, Naoaki Kanagawa, Hitoshi Shiga, Naoya Tokiwa, Yoshihiko Shindo, Toshiaki Edahiro, Takeshi Ogawa, Makoto Iwai, Osamu Nagao, Junji Musha, Takatoshi Minamoto, Kosuke Yanagidaira, Yuya Suzuki, Dai Nakamura, Yoshikazu Hosomura, Hiromitsu Komai, Yuka Furuta, Mai Muramoto, Rieko Tanaka, Go Shikata, Ayako Yuminaka, Kiyofumi Sakurai, Manabu Sakai, Hong Ding, Mitsuyuki Watanabe, Yosuke Kato, Toru Miwa, Alex Mak, Masaru Nakamichi, Gertjan Hemink, Dana Lee, Masaaki Higashitani, Brian Murphy, Bo Lei, Yasuhiko Matsunaga, Kiyomi Naruke, Takahiko Hara

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2008

A 120mm² 16Gb 4-MLC NAND Flash Memory with 43nm CMOS Technology.

Kazushige Kanda, Masaru Koyanagi, Toshio Yamamura, Koji Hosono, Masahiro Yoshihara, Toru Miwa, Yosuke Kato, Alex Mak, Siu Lung Chan, Frank Tsai, Raul Cernea, Binh Le, Eiichi Makino, Takashi Taira, Hiroyuki Otake, Norifumi Kajimura, Susumu Fujimura, Yoshiaki Takeuchi, Mikihiko Itoh, Masanobu Shirakawa, Dai Nakamura, Yuya Suzuki, Yuki Okukawa, Masatsugu Kojima, Kazuhide Yoneya, Takamichi Arizono, Toshiki Hisada, Shinji Miyamoto, Mitsuhiro Noguchi, Toshitake Yaegashi, Masaaki Higashitani, Fumitoshi Ito, Teruhiko Kamei, Gertjan Hemink, Tooru Maruyama, Kazumi Ino, Shigeo Ohshima

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008