Takeshi Nakano

According to our database1, Takeshi Nakano authored at least 7 papers between 2009 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
A 29-Gb/mm<sup>2</sup> 1-Tb 3-b/Cell 3-D Flash Memory With CMOS Direct Bonded Array (CBA) Technology.
IEEE J. Solid State Circuits, January, 2026

2025

2023
A 1Tb 3b/Cell 3D-Flash Memory of more than 17Gb/mm<sup>2</sup> bit density with 3.2Gbps interface and 205MB/s program throughput.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2021
Practical Learning of Science for Elementary School Students via Programming and Control Experimentation.
J. Robotics Netw. Artif. Life, 2021

2019

2018
A Fast Learning Recommender Estimating Preferred Ranges of Features.
Proceedings of the Knowledge-Based Software Engineering: 2018, 2018

2009


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