Masahiro Yoshihara
According to our database1,
Masahiro Yoshihara
authored at least 6 papers
between 2008 and 2021.
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Bibliography
2021
A 128Gb 1-bit/Cell 96-Word-Line-Layer 3D Flash Memory to Improve the Random Read Latency With tProg = 75 μs and tR = 4 μs.
IEEE J. Solid State Circuits, 2021
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2020
13.5 A 128Gb 1b/Cell 96-Word-Line-Layer 3D Flash Memory to Improve Random Read Latency with tPROG=75µs and tR=4µs.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2012
A 19nm 112.8mm<sup>2</sup> 64Gb multi-level flash memory with 400Mb/s/pin 1.8V Toggle Mode interface.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2010
An Effect of Inhibitory Connections on Synchronous Firing Assembly in the Inhibitory Connected Pulse Coupled Neural Network.
Proceedings of the Neural Information Processing. Theory and Algorithms, 2010
2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008