Kosuke Yanagidaira
Orcid: 0009-0003-9676-9702
According to our database1,
Kosuke Yanagidaira authored at least 14 papers
between 2009 and 2026.
Collaborative distances:
Collaborative distances:
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Bibliography
2026
A 29-Gb/mm<sup>2</sup> 1-Tb 3-b/Cell 3-D Flash Memory With CMOS Direct Bonded Array (CBA) Technology.
IEEE J. Solid State Circuits, January, 2026
2025
UEO Channel Routing Algorithm to Alleviate Local Congestion for Generalized Channels.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2025
A 1Tb 3b/cell 3D-Flash Memory with a 29%-Improved-Energy-Efficiency Read Operation and 4.8Gb/s Power-Isolated Low-Tapped-Termination I/Os.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
2023
IEEE J. Solid State Circuits, 2023
A 1Tb 3b/Cell 3D-Flash Memory of more than 17Gb/mm<sup>2</sup> bit density with 3.2Gbps interface and 205MB/s program throughput.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Proceedings of the IEEE International Memory Workshop, 2023
2022
A 1-Tb 4b/Cell 4-Plane 162-Layer 3D Flash Memory With a 2.4-Gb/s I/O Speed Interface.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2021
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2020
IEEE J. Solid State Circuits, 2020
2019
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2012
IEEE J. Solid State Circuits, 2012
2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009