David Donofrio
According to our database1,
David Donofrio
authored at least 43 papers
between 2009 and 2022.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2022
Training spiking neuronal networks to perform motor control using reinforcement and evolutionary learning.
Frontiers Comput. Neurosci., 2022
2021
CircusTent: A Tool for Measuring the Performance of Atomic Memory Operations on Emerging Architectures.
Proceedings of the OpenSHMEM and Related Technologies. OpenSHMEM in the Era of Exascale and Smart Networks, 2021
Proceedings of the 7th IEEE/ACM Workshop on the LLVM Compiler Infrastructure in HPC, 2021
Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021
2020
Errata to "Exploring Fault-Tolerant Erasure Codes for Scalable All-Flash Array Clusters".
IEEE Trans. Parallel Distributed Syst., 2020
TIGER: Topology-aware Assignment using Ising machines Application to Classical Algorithm Tasks and Quantum Circuit Gates.
CoRR, 2020
Proceedings of the MEMSYS 2020: The International Symposium on Memory Systems, 2020
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2020
Understanding Quantum Control Processor Capabilities and Limitations through Circuit Characterization.
Proceedings of the International Conference on Rebooting Computing, 2020
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020
2019
IEEE Trans. Parallel Distributed Syst., 2019
PARADISE - Post-Moore Architecture and Accelerator Design Space Exploration Using Device Level Simulation and Experiments.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2019
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019
2018
International Neuroscience Initiatives through the Lens of High-Performance Computing.
Computer, 2018
Proceedings of the Workshop on Memory Centric High Performance Computing, 2018
Proceedings of the International Symposium on Memory Systems, 2018
A Parallel, Energy Efficient Hardware Architecture for the merAligner on FPGA Using Chisel HCL.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018
2017
Towards an Integrated Strategy to Preserve Digital Computing Performance Scaling Using Emerging Technologies.
Proceedings of the High Performance Computing, 2017
Proceedings of the High Performance Computing, 2017
CASPER - Configurable design space exploration of programmable architectures for machine learning using beyond moore devices.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017
TraceTracker: Hardware/software co-evaluation for large-scale I/O workload reconstruction.
Proceedings of the 2017 IEEE International Symposium on Workload Characterization, 2017
Understanding system characteristics of online erasure coding on scalable, distributed and large-scale SSD array systems.
Proceedings of the 2017 IEEE International Symposium on Workload Characterization, 2017
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017
2016
ACM Trans. Storage, 2016
Characterizing the Performance of Hybrid Memory Cube Using ApexMAP Application Probes.
Proceedings of the Second International Symposium on Memory Systems, 2016
Proceedings of the 2016 IEEE International Symposium on Performance Analysis of Systems and Software, 2016
Proceedings of the 2016 IEEE High Performance Extreme Computing Conference, 2016
2015
Improving Performance of Structured-Memory, Data-Intensive Applications on Multi-core Platforms via a Space-Filling Curve Memory Layout.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015
OpenNVM: An open-sourced FPGA-based NVM controller for low level memory characterization.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
NVMMU: A Non-volatile Memory Management Unit for Heterogeneous GPU-SSD Architectures.
Proceedings of the 2015 International Conference on Parallel Architectures and Compilation, 2015
Integrating 3D Resistive Memory Cache into GPGPU for Energy-Efficient Data Processing.
Proceedings of the 2015 International Conference on Parallel Architectures and Compilation, 2015
2014
Proceedings of the 1st International Workshop on Hardware-Software Co-Design for High Performance Computing, 2014
OpenSoC Fabric: On-Chip Network Generator: Using Chisel to Generate a Parameterizable On-Chip Interconnect Fabric.
Proceedings of the 2014 International Workshop on Network on Chip Architectures, 2014
2012
Accelerating analysis of void space in porous materials on multicore and GPU platforms.
Int. J. High Perform. Comput. Appl., 2012
NANDFlashSim: Intrinsic latency variation aware NAND flash memory system modeling and simulation at microarchitecture level.
Proceedings of the IEEE 28th Symposium on Mass Storage Systems and Technologies, 2012
2011
Proceedings of the Encyclopedia of Parallel Computing, 2011
Proceedings of the Conference on High Performance Computing Networking, 2011
2010
Proceedings of the High Performance Computing: From Grids and Clouds to Exascale, 2010
2009