Davide B. Bartolini

Orcid: 0009-0009-0212-2224

According to our database1, Davide B. Bartolini authored at least 25 papers between 2011 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

2022
AgileWatts: An Energy-Efficient CPU Core Idle-State Architecture for Latency-Sensitive Server Applications.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

AgilePkgC: An Agile System Idle State Architecture for Energy Proportional Datacenter Servers.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

Characterizing Molecular Dynamics Simulation on Commodity Platforms.
Proceedings of the IEEE International Symposium on Workload Characterization, 2022

2019
Fast and Accurate Entity Linking via Graph Embedding.
Proceedings of the 2nd Joint International Workshop on Graph Data Management Experiences & Systems (GRADES) and Network Data Analytics (NDA), 2019

2018
Frequency Scaling As a Security Threat on Multicore Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

2017
Isolation scheduling on multicores: model and scheduling approaches.
Real Time Syst., 2017

Towards a property graph generator for benchmarking.
Proceedings of the Fifth International Workshop on Graph Data-management Experiences & Systems, 2017

2016
A Software Cache Partitioning System for Hash-Based Caches.
ACM Trans. Archit. Code Optim., 2016

On the capacity of thermal covert channels in multicores.
Proceedings of the Eleventh European Conference on Computer Systems, 2016

2015
Techniques and tools for efficient, Qos-driven warehouse-scale computing.
PhD thesis, 2015

An Isolation Scheduling Model for Multicores.
Proceedings of the 2015 IEEE Real-Time Systems Symposium, 2015

Rubik: fast analytical power management for latency-critical systems.
Proceedings of the 48th International Symposium on Microarchitecture, 2015

2014
Automated Fine-Grained CPU Provisioning for Virtual Machines.
ACM Trans. Archit. Code Optim., 2014

2013
HERA Project's Holistic Evolutionary Framework.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Tessellation: refactoring the OS around explicit resource containers with continuous adaptation.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

The autonomic operating system research project: achievements and future directions.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Coloring the cloud for predictable performance.
Proceedings of the ACM Symposium on Cloud Computing, SOCC '13, 2013

Towards a performance-as-a-service cloud.
Proceedings of the ACM Symposium on Cloud Computing, SOCC '13, 2013

2012
On the Evolution of Hardware Circuits via Reconfigurable Architectures.
ACM Trans. Reconfigurable Technol. Syst., 2012

A Framework for Thermal and Performance Management.
Proceedings of the 2012 Workshop on Managing Systems Automatically and Dynamically, 2012

DGECS: Description Generator for Evolved Circuits Synthesis.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

Metronome: operating system level performance management via self-adaptive computing.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011
HERA: Hardware evolution over reconfigurable architectures.
Proceedings of the 1st International Workshop on Computing in Heterogeneous, 2011

A bird's eye view of FPGA-based Evolvable Hardware.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011


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