Davide Sanzogni
According to our database1,
Davide Sanzogni
authored at least 7 papers
between 2006 and 2013.
Collaborative distances:
Collaborative distances:
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Bibliography
2013
A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOS.
Proceedings of the ESSCIRC 2013, 2013
2011
An inductor-less 13.5-Gbps 8-mW analog equalizer for multi-channel multi-frequency operation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2009
A Multi-Standard 1.5 to 10 Gb/s Latch-Based 3-Tap DFE Receiver With a SSC Tolerant CDR for Serial Backplane Communication.
IEEE J. Solid State Circuits, 2009
2008
A 10Gb/s receiver with linear backplane equalization and mixer-based self-aligned CDR.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
2006
A 0.13 μm CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier.
IEEE J. Solid State Circuits, 2006
IEEE J. Solid State Circuits, 2006