Antonio Liscidini
Orcid: 0000-0003-0522-3097
According to our database1,
Antonio Liscidini
authored at least 60 papers
between 2005 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
4.5 A Reconfigurable, Multi-Channel Quantized-Analog Transmitter with <-35dB EVM and <-51dBc ACLR in 22nm FDSOI.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2023
A Wide Bandwidth, Low Power, Linear Quantized-Analog VGA in 28 nm CMOS Technology and 1.2V Supply.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023
A 36 GHz Bandwidth, High Linear, Low Power, Driver Modulator, in 28 nm CMOS Technology Based on Quantized-Analog Signal Processing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
A 22nm 56TOPS/W 6/8-bit Linearly-scalable R-2R Multiply-and-Accumulate Architecture with 2.2ns Latency.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
2022
Optimization of Quantized Analog Signal Processing Using Genetic Algorithms and μ-Law.
IEEE Open J. Circuits Syst., 2022
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
2021
IEEE J. Solid State Circuits, 2021
2020
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
2019
A Third-Order Integrated Passive Switched-Capacitor Filter Obtained With a Continuous-Time Design Approach.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
2018
A Digital Filtering ADC With Programmable Blocker Cancellation for Wireless Receivers.
IEEE J. Solid State Circuits, 2018
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
A LTE RX front-end with digitally programmable multi-band blocker cancellation in 28nm CMOS.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
2016
IEEE Trans. Circuits Syst. II Express Briefs, 2016
Introduction to the December Special Issue on the 2016 IEEE International Solid-State Circuits Conference.
IEEE J. Solid State Circuits, 2016
IEEE J. Solid State Circuits, 2016
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2015
IEEE Trans. Circuits Syst. II Express Briefs, 2015
IEEE J. Solid State Circuits, 2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the ESSCIRC Conference 2015, 2015
2014
IEEE J. Solid State Circuits, 2014
An Intuitive Analysis of Phase Noise Fundamental Limits Suitable for Benchmarking LC Oscillators.
IEEE J. Solid State Circuits, 2014
IEEE J. Solid State Circuits, 2014
2013
IEEE Trans. Circuits Syst. II Express Briefs, 2013
Introduction to the Special Issue on the 38th European Solid-State Circuits Conference (ESSCIRC).
IEEE J. Solid State Circuits, 2013
IEEE J. Solid State Circuits, 2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
Proceedings of the ESSCIRC 2013, 2013
2012
IEEE Trans. Circuits Syst. II Express Briefs, 2012
IEEE J. Solid State Circuits, 2012
A 3.6 mW, 90 nm CMOS Gated-Vernier Time-to-Digital Converter With an Equivalent Resolution of 3.2 ps.
IEEE J. Solid State Circuits, 2012
A 90nm CMOS gated-ring-oscillator-based 2-dimension Vernier time-to-digital converter.
Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2011
Corrections to "Current-Mode, WCDMA Channel Filter With In-Band Noise Shaping" [Sep 10 1770-1780].
IEEE J. Solid State Circuits, 2011
A complete DVB-T/ATSC tuner analog base-band implemented with a single filtering ADC.
Proceedings of the 37th European Solid-State Circuits Conference, 2011
Proceedings of the 37th European Solid-State Circuits Conference, 2011
2010
IEEE J. Solid State Circuits, 2010
IEEE J. Solid State Circuits, 2010
IEEE J. Solid State Circuits, 2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
2008
IEEE Trans. Circuits Syst. II Express Briefs, 2008
A 2.4 GHz 3.6mW 0.35mm<sup>2</sup> Quadrature Front-End RX for ZigBee and WPAN Applications.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
Proceedings of the ESSCIRC 2008, 2008
2006
IEEE J. Solid State Circuits, 2006
A 0.13 μm CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier.
IEEE J. Solid State Circuits, 2006
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006
2005
A variable gain RF front-end, based on a Voltage-Voltage feedback LNA, for multistandard applications.
IEEE J. Solid State Circuits, 2005