Dinesh Gaitonde

According to our database, Dinesh Gaitonde authored at least 20 papers between 1998 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

Guaranteed Yet Hard to Find: Uncovering FPGA Routing Convergence Paradox.

Shashwat Shrivastava, Stefan Nikolic, Sun Tanaka, Chirag Ravishankar, Dinesh Gaitonde, Mirjana Stojilovic

Proceedings of the 33rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2025

2024

Sensing Timing Margin Contingencies in the Programmable Fabric of FPGAs.

Arun Iyer, Nishant Pawar, Dinesh Gaitonde, Nanditha Rao

Proceedings of the International Conference on Field Programmable Technology, 2024

2023

IIBLAST: Speeding Up Commercial FPGA Routing by Decoupling and Mitigating the Intra-CLB Bottleneck.

Shashwat Shrivastava, Stefan Nikolic, Chirag Ravishankar, Dinesh Gaitonde, Mirjana Stojilovic

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

AMD Next-Generation FPGA Built from Chiplets.

Dinesh Gaitonde

Proceedings of the 35th IEEE Hot Chips Symposium, 2023

Mitigating the Last-Mile Bottleneck: A Two-Step Approach For Faster Commercial FPGA Routing.

Shashwat Shrivastava, Stefan Nikolic, Chirag Ravishankar, Dinesh Gaitonde, Mirjana Stojilovic

Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

Modular and Lean Architecture with Elasticity for Sparse Matrix Vector Multiplication on FPGAs.

Abhishek Kumar Jain, Chirag Ravishankar, Hossein Omidian, Sharan Kumar, Maithilee Kulkarni, Aashish Tripathi, Dinesh Gaitonde

Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

2022

100% Visibility at MHz Speed: Efficient Soft Scan-Chain Insertion on AMD/Xilinx FPGAs.

Hossein Omidian, Eddie Hung, Dinesh Gaitonde

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2022

2021

Sparse Deep Neural Network Acceleration on HBM-Enabled FPGA Platform.

Abhishek Kumar Jain, Sharan Kumar, Aashish Tripathi, Dinesh Gaitonde

Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021

2020

A Domain-Specific Architecture for Accelerating Sparse Matrix Vector Multiplication on FPGAs.

Abhishek Kumar Jain, Hossein Omidian, Henri Fraisse, Mansimran Benipal, Lisa Liu, Dinesh Gaitonde

Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

2019

Versal Network-on-Chip (NoC).

Ian Swarbrick, Dinesh Gaitonde, Sagheer Ahmad, Bala Jayadev, Jeff Cuppett, Abbas Morshed, Brian Gaide, Ygal Arbel

Proceedings of the 2019 IEEE Symposium on High-Performance Interconnects, 2019

Network-on-Chip Programmable Platform in Versal^TM ACAP Architecture.

Ian Swarbrick, Dinesh Gaitonde, Sagheer Ahmad, Brian Gaide, Ygal Arbel

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Xilinx Adaptive Compute Acceleration Platform: Versal^TM Architecture.

Brian Gaide, Dinesh Gaitonde, Chirag Ravishankar, Trevor Bauer

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2018

SAT Based Place-And-Route for High-Speed Designs on 2.5D FPGAs.

Chirag Ravishankar, Henri Fraisse, Dinesh Gaitonde

Proceedings of the International Conference on Field-Programmable Technology, 2018

Placement Strategies for 2.5D FPGA Fabric Architectures.

Chirag Ravishankar, Dinesh Gaitonde, Trevor Bauer

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

A SAT-based Timing Driven Place and Route Flow for Critical Soft IP.

Henri Fraisse, Dinesh Gaitonde

Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

2016

Boolean Satisfiability-Based Routing and Its Application to Xilinx UltraScale Clock Network.

Henri Fraisse, Abhishek Joshi, Dinesh Gaitonde, Alireza Kaviani

Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

2015

Enhancements in UltraScale CLB Architecture.

Shant Chandrakar, Dinesh Gaitonde, Trevor Bauer

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

2014

High capacity and high performance 20nm FPGAs.

Steve Young, Dinesh Gaitonde

Proceedings of the 2014 IEEE Hot Chips 26 Symposium (HCS), 2014

1999

Instruction level power model of microcontrollers.

Chaitali Chakrabarti, Dinesh Gaitonde

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1998

An overview of library characterization in semi-custom design.

Binay Ackalloor, Dinesh Gaitonde

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998