Alireza Kaviani

Orcid: 0000-0003-2229-4911

According to our database1, Alireza Kaviani authored at least 21 papers between 1994 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
RapidStream 2.0: Automated Parallel Implementation of Latency-Insensitive FPGA Designs Through Partial Reconfiguration.
ACM Trans. Reconfigurable Technol. Syst., December, 2023

Addressing the EDA Roadblocks for Domain-specific Compilers: An Industry Perspective.
Proceedings of the 2023 International Symposium on Physical Design, 2023

2022
RWRoute: An Open-source Timing-driven Router for Commercial FPGAs.
ACM Trans. Reconfigurable Technol. Syst., 2022

RapidStream: Parallel Physical Implementation of FPGA HLS Designs.
Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022

2021
Software-like Compilation for Data Center FPGA Accelerators.
Proceedings of the HEART '21: 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2021

2019
An Open-Source Lightweight Timing Model for RapidWright.
Proceedings of the International Conference on Field-Programmable Technology, 2019

Build Your Own Domain-specific Solutions with RapidWright: Invited Tutorial.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2018
RapidWright: Enabling Custom Crafted Implementations for FPGAs.
Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

2017
LinkBlaze: Efficient global data movement for FPGAs.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

2016
Boolean Satisfiability-Based Routing and Its Application to Xilinx UltraScale Clock Network.
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

2015
Improving FPGA NoC performance using virtual cut-through switching technique.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Analyzing the divide between FPGA academic and commercial results.
Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

2008
Programmable all-digital adaptive deskewing and phase shifting.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

2004
Phase Alignment Using Asynchronous State Machines.
Proceedings of the 10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 2004

2002
Using Design Hierarchy to Improve Quality of Results in FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 2002

Dynamic power consumption in Virtex[tm]-II FPGA family.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2002

2000
Technology mapping issues for an FPGA with lookup tables and PLA-like blocks.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2000

1999
The Hybrid Field-Programmable Architecture.
IEEE Des. Test Comput., 1999

1998
Computational field programmable architecture.
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998

1996
Hybrid FPGA Architecture.
Proceedings of the 1996 Fourth International Symposium on Field Programmable Gate Arrays, 1996

1994
On Scheduling in Multiprocessor Systems Using Fuzzy Logic.
Proceedings of the 24th IEEE International Symposium on Multiple-Valued Logic, 1994


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