E. Baylac

According to our database, E. Baylac authored at least 2 papers between 2014 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

Performance and layout effects of SiGe channel in 14nm UTBB FDSOI: SiGe-first vs. SiGe-last integration.

R. Berthelon, François Andrieu, P. Perreau, E. Baylac, A. Pofelski, Emmanuel Josse, Didier Dutartre, A. Claverie, Michel Haond

Proceedings of the 46th European Solid-State Device Research Conference, 2016

2014

Strain and layout management in dual channel (sSOI substrate, SiGe channel) planar FDSOI MOSFETs.

François Andrieu, Mikaël Cassé, E. Baylac, P. Perreau, O. Nier, Denis Rideau, R. Berthelon, Franck Pourchon, A. Pofelski, Barbara De Salvo, C. Gallon, Vincent Mazzocchi, D. Barge, C. Gaumer, O. Gourhant, A. Cros, Vincent Barral, Rossella Ranica, Nicolas Planes, Walter Schwarzenbach, E. Richard, Emmanuel Josse, Olivier Weber, Franck Arnaud, Maud Vinet, Olivier Faynot, Michel Haond

Proceedings of the 44th European Solid State Device Research Conference, 2014