Emre Tuncer

According to our database1, Emre Tuncer authored at least 11 papers between 1993 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021
A graph placement methodology for fast chip design.
Nat., 2021

2020
Chip Placement with Deep Reinforcement Learning.
CoRR, 2020

2009
Enabling adaptability through elastic clocks.
Proceedings of the 46th Design Automation Conference, 2009

2007
Use of statistical timing analysis on real designs.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
SACI: statistical static timing analysis of coupled interconnects.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

CGTA: current gain-based timing analysis for logic cells.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005
Sensitivity-Based Gate Delay Propagation in Static Timing Analysis.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

An empirical study of crosstalk in VDSM technologies.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

Modeling and Propagation of Noisy Waveforms in Static Timing Analysis.
Proceedings of the 2005 Design, 2005

2004
TFA: a threshold-based filtering algorithm for propagation delay and slew calculation of high-speed VLSI interconnects.
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

1993
An efficient methodology for extraction and simulation of transmission lines for application specific electronic modules.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993


  Loading...