Eustace Painkras

According to our database1, Eustace Painkras authored at least 8 papers between 2008 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2013
A chip multiprocessor for a large-scale neural simulator.
PhD thesis, 2013

Overview of the SpiNNaker System Architecture.
IEEE Trans. Computers, 2013

SpiNNaker: Fault tolerance in a power- and area- constrained large-scale neuromimetic architecture.
Parallel Comput., 2013

SpiNNaker: A 1-W 18-Core System-on-Chip for Massively-Parallel Neural Network Simulation.
IEEE J. Solid State Circuits, 2013

2012
Scalable communications for a million-core neural processing architecture.
J. Parallel Distributed Comput., 2012

SpiNNaker: A multi-core System-on-Chip for massively-parallel neural net simulation.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
SpiNNaker: Design and Implementation of a GALS Multicore System-on-Chip.
ACM J. Emerg. Technol. Comput. Syst., 2011

2008
SpiNNaker: Mapping neural networks onto a massively-parallel chip multiprocessor.
Proceedings of the International Joint Conference on Neural Networks, 2008


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