David R. Lester

Orcid: 0000-0002-7267-291X

  • The University of Manchester

According to our database1, David R. Lester authored at least 51 papers between 1987 and 2019.

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In proceedings 
PhD thesis 


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On csauthors.net:


Stochastic rounding and reduced-precision fixed-point arithmetic for solving neural ODEs.
CoRR, 2019

Code Generation in Computational Neuroscience: A Review of Tools and Techniques.
Frontiers Neuroinformatics, 2018

SpiNNTools: The Execution Engine for the SpiNNaker Platform.
CoRR, 2018

Approximate Fixed-Point Elementary Function Accelerator for the SpiNNaker-2 Neuromorphic Chip.
Proceedings of the 25th IEEE Symposium on Computer Arithmetic, 2018

A fixed point exponential function accelerator for a neuromorphic many-core system.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Live demonstration: Dynamic voltage and frequency scaling for neuromorphic many-core systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Brewing the first ever automatic memory management utility for SpiNNaker: Real-time garbage collection for STDP simulations.
Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

A Collaborative Simulation-Analysis Workflow for Computational Neuroscience Using HPC.
Proceedings of the High-Performance Scientific Computing, 2016

Transport-Independent Protocols for Universal AER Communications.
Proceedings of the Neural Information Processing - 22nd International Conference, 2015

Overview of the SpiNNaker System Architecture.
IEEE Trans. Computers, 2013

SpiNNaker: Fault tolerance in a power- and area- constrained large-scale neuromimetic architecture.
Parallel Comput., 2013

SpiNNaker: A 1-W 18-Core System-on-Chip for Massively-Parallel Neural Network Simulation.
IEEE J. Solid State Circuits, 2013

A location-independent direct link neuromorphic interface.
Proceedings of the 2013 International Joint Conference on Neural Networks, 2013

The world's shortest correct exact real arithmetic program?
Inf. Comput., 2012

Concurrent heterogeneous neural model simulation on real-time neuromimetic hardware.
Neural Networks, 2011

A monadic approach to automated reasoning for Bluespec SystemVerilog.
Innov. Syst. Softw. Eng., 2011

SpiNNaker: Distributed Computer Engineering for Neuromorphics.
Proceedings of the Neural Nets WIRN11, 2011

Processing with a million cores.
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011

Spiking Neural PID Controllers.
Proceedings of the Neural Information Processing - 18th International Conference, 2011

Improved bound for stochastic formal correctness of numerical algorithms.
Innov. Syst. Softw. Eng., 2010

Interfacing Real-Time Spiking I/O with the SpiNNaker Neuromimetic Architecture.
Aust. J. Intell. Inf. Process. Syst., 2010

Machine-efficient Chebyshev approximation for exact arithmetic: their use with first-order ordinary differential equations.
Proceedings of the 2010 Spring Simulation Multiconference, 2010

A Prototype Embedding of Bluespec SystemVerilog in the PVS Theorem Prover.
Proceedings of the Second NASA Formal Methods Symposium, 2010

A communication infrastructure for a million processor machine.
Proceedings of the 7th Conference on Computing Frontiers, 2010

Verified Real Number Calculations: A Library for Interval Arithmetic.
IEEE Trans. Computers, 2009

Stochastic Formal Methods for Hybrid Systems.
Proceedings of the First NASA Formal Methods Symposium, 2009

Real Number Calculations and Theorem Proving.
Proceedings of the Theorem Proving in Higher Order Logics, 21st International Conference, 2008

SpiNNaker: Mapping neural networks onto a massively-parallel chip multiprocessor.
Proceedings of the International Joint Conference on Neural Networks, 2008

SpiNNaker: The Design Automation Problem.
Proceedings of the Advances in Neuro-Information Processing, 15th International Conference, 2008

Stochastic Formal Methods: An Application to Accuracy of Numeric Software.
Proceedings of the 40th Hawaii International International Conference on Systems Science (HICSS-40 2007), 2007

Functional Pearl: Enumerating the rationals.
J. Funct. Program., 2006

Stochastic Formal Methods for Rare Failure Events due to the Accumulation of Errors
CoRR, 2006

Real Number Calculations and Theorem Proving.
Proceedings of the Theorem Proving in Higher Order Logics, 18th International Conference, 2005

Using PVS to validate the algorithms of an exact arithmetic.
Theor. Comput. Sci., 2003

Using PVS to Validate the Inverse Trigonometric Functions of an Exact Arithmetic.
Proceedings of the Numerical Software with Result Verification, 2003

A constructive algorithm for finding the exact roots of polynomials with computable real coefficients.
Theor. Comput. Sci., 2002

Effective Continued Fractions.
Proceedings of the 15th IEEE Symposium on Computer Arithmetic (Arith-15 2001), 2001

A Survey of Exact Arithmetic Implementations.
Proceedings of the Computability and Complexity in Analysis, 4th International Workshop, 2000

Exact Statistics and Continued Fractions.
J. Univers. Comput. Sci., 1995

The Correctness of a Higher-Order Lazy Functional Language Implementation: An Exercise in Mechanical Theorem Proving.
Proceedings of the Higher-Order Algebra, 1995

Inducing Students to Induct.
Proceedings of the Functional Programming Languages in Education, 1995

Towards Machine-Checked Compiler Correctness for Higher-order Pure Functional Languages.
Proceedings of the Computer Science Logic, 8th International Workshop, 1994

An Executable Specification of the HDG-Machine.
Int. J. High Speed Comput., 1993

Distributed Garbage Collection of Cyclic Structures.
Proceedings of the 1993 Glasgow Workshop on Functional Programming, 1993

A Modular Fully-lazy Lambda Lifter in HASKELL.
Softw. Pract. Exp., 1991

The HDG-Machine: A Highly Distributed Graph-Reducer for a Transputer Network.
Comput. J., 1991

Vuillemin's Exact Real Arithmetic.
Proceedings of the Functional Programming, 1991

An Efficient Distributed Collection Algorithm.
Proceedings of the PARLE '89: Parallel Architectures and Languages Europe, 1989

Stacklessness: Compiling Recursion for a Distributed Architecture.
Proceedings of the fourth international conference on Functional programming languages and computer architecture, 1989

The G-machine as a representation of stack semantics.
Proceedings of the Functional Programming Languages and Computer Architecture, 1987