Felipe Sampaio

Orcid: 0000-0002-5700-2221

According to our database1, Felipe Sampaio authored at least 29 papers between 2009 and 2023.

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Bibliography

2023
Error Resilience Evaluation of Approximate Storage in the Motion Compensation of VVC Decoders.
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

2022
Error Resilience Evaluation of Approximate Storage in the Intra Prediction of VVC Decoders.
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022

Video Decoder Improvements with Near-Data Speculative Motion Compensation Processing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2020
Evaluation of Cache-Based Memory Hierarchy for HEVC Video Decoding.
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020

Memory Assessment Of Versatile Video Coding.
Proceedings of the IEEE International Conference on Image Processing, 2020

An UHD 4K@60fps Deblocking Filter Hardware Targeting the AV1 Decoder.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

Memory Profiling of H.266 Versatile Video Coding Standard.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2019
Hybrid Scratchpad Video Memory Architecture for Energy-Efficient Parallel HEVC.
IEEE Trans. Circuits Syst. Video Technol., 2019

2017
Research and Development of Pedagogical Objects to Support Inclusive Education.
Proceedings of the Advances in Ergonomics in Design, 2017

2015
Approximation-aware Multi-Level Cells STT-RAM cache architecture.
Proceedings of the 2015 International Conference on Compilers, 2015

2014
Content-driven memory pressure balancing and video memory power management for parallel high efficiency video coding.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

Energy-efficient architecture for advanced video memory.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

dSVM: Energy-efficient distributed Scratchpad Video Memory Architecture for the next-generation High Efficiency Video Coding.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
Content-adaptive reference frame compression based on intra-frame prediction for multiview video coding.
Proceedings of the IEEE International Conference on Image Processing, 2013

Energy-efficient memory hierarchy for motion and disparity estimation in multiview video coding.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
DMPDS: A Fast Motion Estimation Algorithm Targeting High Resolution Videos and Its FPGA Implementation.
Int. J. Reconfigurable Comput., 2012

Spread and Iterative Search: A High Quality Motion Estimation Algorithm for High Definition Videos and Its VLSI Design.
Proceedings of the 2012 IEEE International Conference on Multimedia and Expo, 2012

Motion Vectors Merging: Low Complexity Prediction Unit Decision Heuristic for the Inter-prediction of HEVC Encoders.
Proceedings of the 2012 IEEE International Conference on Multimedia and Expo, 2012

A memory aware and multiplierless VLSI architecture for the complete Intra Prediction of the HEVC emerging standard.
Proceedings of the 19th IEEE International Conference on Image Processing, 2012

Real-time block matching motion estimation onto GPGPU.
Proceedings of the 19th IEEE International Conference on Image Processing, 2012

2011
A multilevel data reuse scheme for Motion Estimation and its VLSI design.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A high throughput H.264/AVC intra-frame encoding loop architecture for HD1080p.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Run-time adaptive energy-aware motion and disparity estimation in multiview video coding.
Proceedings of the 48th Design Automation Conference, 2011

2010
High Throughput and Low Cost Architecture for the Forward Quantization of the H.264/AVC Video Compression Standard.
CLEI Electron. J., 2010

Variable block size motion estimation architecture with a fast bottom-up decision mode and an integrated motion compensation targeting the H.264/AVC video coding standard.
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010

Memory-aware multiple reference frame motion estimation for the H.264/AVC standard.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009
Transforms and quantization design targeting the H.264/AVC intra prediction constraints.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009

Low latency and high throughput dedicated loop of transforms and quantization focusing in the H.264/AVC Intra Prediction.
Proceedings of the International Conference on Image Processing, 2009

A multitransform architecture for the H.264/AVC standard and its design space exploration.
Proceedings of the 16th IEEE International Conference on Electronics, 2009


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