Gary Smith

Affiliations:
  • Gary Smith EDA, Santa Clara, CA, USA
  • Gartner Dataquest, San Jose, CA, USA (former)
  • United States Naval Academy, Annapolis, MD, USA (former)


According to our database1, Gary Smith authored at least 12 papers between 2000 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2014
Updates of the ITRS design cost and power models.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

2009
High-Level Synthesis: Past, Present, and Future.
IEEE Des. Test Comput., 2009

2008
ESL hand-off: fact or EDA fiction?
Proceedings of the 45th Design Automation Conference, 2008

2006
Guest Editors' Introduction: The True State of the Art of ESL Design.
IEEE Des. Test Comput., 2006

2005
Design for manufacturability comes of age.
IEEE Des. Test Comput., 2005

A new era for CAD.
Proceedings of the 2005 International Symposium on Physical Design, 2005

2004
Panel: What happened to the intelligent test bench?
Proceedings of the Ninth IEEE International High-Level Design Validation and Test Workshop 2004, 2004

Platform based design: does it answer the entire SoC challenge?
Proceedings of the 41th Design Automation Conference, 2004

2003
Transaction Based Design: Another Buzzword or the Solution to a Design Problem?
Proceedings of the 2003 Design, 2003

2002
A New Design Cost Model for the 2001 ITRS (invited).
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

Unified tools for SoC embedded systems: mission critical, mission impossible or mission irrelevant?
Proceedings of the 39th Design Automation Conference, 2002

2000
One language or more?: how can we design an SoC at a system level?
Proceedings of ASP-DAC 2000, 2000


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