Haisheng Zheng

Orcid: 0000-0001-8555-4544

According to our database1, Haisheng Zheng authored at least 21 papers between 2013 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2025
IncreMacro: Incremental Macro Placement Refinement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., August, 2025

On-Policy Optimization with Group Equivalent Preference for Multi-Programming Language Understanding.
CoRR, May, 2025

Architect of the Bits World: Masked Autoregressive Modeling for Circuit Generation Guided by Truth Table.
CoRR, February, 2025

Energy performance prediction of centrifugal pumps based on adaptive support vector regression.
Eng. Appl. Artif. Intell., 2025

Divergent Thoughts toward One Goal: LLM-based Multi-Agent Collaboration System for Electronic Design Automation.
Proceedings of the 2025 Conference of the Nations of the Americas Chapter of the Association for Computational Linguistics: Human Language Technologies, 2025

Circuit Representation Learning with Masked Gate Modeling and Verilog-AIG Alignment.
Proceedings of the Thirteenth International Conference on Learning Representations, 2025

iRw: An Intelligent Rewriting.
Proceedings of the Design, Automation & Test in Europe Conference, 2025

Efficient OpAmp Adaptation for Zoom Attention to Golden Contexts.
Proceedings of the 63rd Annual Meeting of the Association for Computational Linguistics (Volume 1: Long Papers), 2025

2024
ChatEDA: A Large Language Model Powered Autonomous Agent for EDA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2024

Parameter-Efficient Sparsity Crafting from Dense to Mixture-of-Experts for Instruction Tuning on General Tasks.
CoRR, 2024

IncreMacro: Incremental Macro Placement Refinement.
Proceedings of the 2024 International Symposium on Physical Design, 2024

Parameter-Efficient Sparsity Crafting from Dense to Mixture-of-Experts for Instruction Tuning on General Tasks.
Proceedings of the 2024 Conference on Empirical Methods in Natural Language Processing, 2024

CBTune: Contextual Bandit Tuning for Logic Synthesis.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

LSTP: A Logic Synthesis Timing Predictor.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023
A High-Performance Accelerator for Super-Resolution Processing on Embedded GPU.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2023

AlphaSyn: Logic Synthesis Optimization with Efficient Monte Carlo Tree Search.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU Acceleration.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
GTuner: tuning DNN computations on GPU via graph attention network.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
A High-Performance Accelerator for Super-Resolution Processing on Embedded GPU.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

2016
Fluorescence-based temperature sensor for in-situ imaging local temperature of aluminum nanoparticles on plasmonic gratings.
Proceedings of the 2016 IEEE SENSORS, Orlando, FL, USA, October 30 - November 3, 2016, 2016

2013
A novel micro-deformation monitoring system for large scale structure.
Proceedings of the 2013 IEEE International Geoscience and Remote Sensing Symposium, 2013


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