Haojie Ye

Orcid: 0000-0001-5360-5159

According to our database1, Haojie Ye authored at least 14 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Fuzzy clustering for feature extraction in wavelet-based fault gear identification of electrical machines.
J. Intell. Fuzzy Syst., January, 2024

2023
Demystifying Graph Sparsification Algorithms in Graph Properties Preservation.
Proc. VLDB Endow., November, 2023

Everest: GPU-Accelerated System For Mining Temporal Motifs.
Proc. VLDB Endow., 2023

In-Memory Versioning (IMV).
IEEE Comput. Archit. Lett., 2023

Testing the Compiler for a New-Born Programming Language: An Industrial Case Study (Experience Paper).
Proceedings of the 32nd ACM SIGSOFT International Symposium on Software Testing and Analysis, 2023

RecPIM: A PIM-Enabled DRAM-RRAM Hybrid Memory System For Recommendation Models.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023

GRACE: A Scalable Graph-Based Approach to Accelerating Recommendation Model Inference.
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

2022
Mint: An Accelerator For Mining Temporal Motifs.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

NDMiner: accelerating graph pattern mining using near data processing.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

Locality-Aware Optimizations for Improving Remote Memory Latency in Multi-GPU Systems.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022

2021
CoDR: Computation and Data Reuse Aware CNN Accelerator.
CoRR, 2021

A Deep Dive Into Understanding The Random Walk-Based Temporal Graph Learning.
Proceedings of the IEEE International Symposium on Workload Characterization, 2021

2020
CoPTA: Contiguous Pattern Speculating TLB Architecture.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2020

Sparse-TPU: adapting systolic arrays for sparse matrices.
Proceedings of the ICS '20: 2020 International Conference on Supercomputing, 2020


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