Haosheng Zhang

Orcid: 0000-0002-3413-8249

According to our database1, Haosheng Zhang authored at least 15 papers between 2014 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 


On csauthors.net:


A Ka-Band SATCOM Transceiver in 65-nm CMOS With High-Linearity TX and Dual-Channel Wide-Dynamic-Range RX for Terrestrial Terminal.
IEEE J. Solid State Circuits, 2022

A Fully Synthesizable Fractional-N MDLL With Zero-Order Interpolation-Based DTC Nonlinearity Calibration and Two-Step Hybrid Phase Offset Calibration.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

An Easily Fabricated High Performance Fabry-Perot Optical Fiber Humidity Sensor Filled with Graphene Quantum Dots.
Sensors, 2021

A 39-GHz 64-Element Phased-Array Transceiver With Built-In Phase and Amplitude Calibrations for Large-Array 5G NR in 65-nm CMOS.
IEEE J. Solid State Circuits, 2020

Orthogonal Waveform Design of MIMO Radar Based on Niche Genetic Algorithm.
Proceedings of the IEEE International Conference on Signal Processing, 2020

ULPAC: A Miniaturized Ultralow-Power Atomic Clock.
IEEE J. Solid State Circuits, 2019

A 60-GHz 3.0-Gb/s Spectrum Efficient BPOOK Transceiver for Low-Power Short-Range Wireless in 65-nm CMOS.
IEEE J. Solid State Circuits, 2019

A Power-Efficient Pulse-VCO for Chip-Scale Atomic Clock.
IEICE Trans. Electron., 2019

0.2mW 70Fsrms-Jitter Injection-Locked PLL Using De-Sensitized SSPD-Based Injecting-Time Self-Alignment Achieving -270dB FoM and -66dBc Reference Spur.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

Ultra-Low-Power Atomic Clock for Satellite Constellation with 2.2×10<sup>-12</sup> Long-Term Allan Deviation Using Cesium Coherent Population Trapping.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

An HDL-described Fully-synthesizable Sub-GHz IoT Transceiver with Ring Oscillator based Frequency Synthesizer and Digital Background EVM Calibration.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

A Low-Power Pulse-Shaped Duobinary ASK Modulator for IEEE 802.11ad Compliant 60GHz Transmitter in 65nm CMOS.
IEICE Trans. Electron., 2018

A 1.2ps-jitter fully-synthesizable fully-calibrated fractional-N injection-locked PLL using true arbitrary nonlinearity calibration technique.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

Learning Deep Features for Classification of Typical Ecological Environmental Elements in High-Resolution Remote Sensing Images.
Proceedings of the 10th International Symposium on Computational Intelligence and Design, 2017

A Countermeasure for DES with Both Rotating Masks and Secured S-Boxes.
Proceedings of the Tenth International Conference on Computational Intelligence and Security, 2014