Harish Patil

According to our database, Harish Patil authored at least 22 papers between 1993 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

LoopPoint: Checkpoint-driven Sampled Simulation for Multi-threaded Applications.

Alen Sabu, Harish Patil, Wim Heirman, Trevor E. Carlson

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

2021

ELFies: Executable Region Checkpoints for Performance Analysis and Simulation.

Harish Patil, Alexander Isaev, Wim Heirman, Alen Sabu, Ali Hajiabadi, Trevor E. Carlson

Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2021

2015

Graph-matching-based simulation-region selection for multiple binaries.

Charles Yount, Harish Patil, Mohammad S. Islam, Aditya Srikanth

Proceedings of the 2015 IEEE International Symposium on Performance Analysis of Systems and Software, 2015

Fast Computational GPU Design with GT-Pin.

Melanie Kambadur, Sunpyo Hong, Juan Cabral, Harish Patil, Chi-Keung Luk, Sohaib Sajid, Martha A. Kim

Proceedings of the 2015 IEEE International Symposium on Workload Characterization, 2015

2014

DrDebug: Deterministic Replay based Cyclic Debugging with Dynamic Slicing.

Yan Wang, Harish Patil, Cristiano Pereira, Gregory Lueck, Rajiv Gupta, Iulian Neamtiu

Proceedings of the 12th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2014

2012

PinADX: an interface for customizable debugging with dynamic instrumentation.

Gregory Lueck, Harish Patil, Cristiano Pereira

Proceedings of the 10th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2012

2010

Analyzing Parallel Programs with Pin.

Moshe Bach, Mark Charney, Robert Cohn, Elena Demikhovsky, Tevi Devor, Kim M. Hazelwood, Aamer Jaleel, Chi-Keung Luk, Gail Lyons, Harish Patil, Ady Tal

Computer, 2010

PinPlay: a framework for deterministic replay and reproducible analysis of parallel programs.

Harish Patil, Cristiano Pereira, Mack Stallcup, Gregory Lueck, James Cownie

Proceedings of the CGO 2010, 2010

2008

Reproducible simulation of multi-threaded workloads for architecture design exploration.

Cristiano Pereira, Harish Patil, Brad Calder

Proceedings of the 4th International Symposium on Workload Characterization (IISWC 2008), 2008

2007

Cross Binary Simulation Points.

Erez Perelman, Jeremy Lau, Harish Patil, Aamer Jaleel, Greg Hamerly, Brad Calder

Proceedings of the 2007 IEEE International Symposium on Performance Analysis of Systems and Software, 2007

2006

Automatic logging of operating system effects to guide application-level architecture simulation.

Satish Narayanasamy, Cristiano Pereira, Harish Patil, Robert Cohn, Brad Calder

Proceedings of the Joint International Conference on Measurement and Modeling of Computer Systems, 2006

2005

Pin: building customized program analysis tools with dynamic instrumentation.

Chi-Keung Luk, Robert S. Cohn, Robert Muth, Harish Patil, Artur Klauser, P. Geoffrey Lowney, Steven Wallace, Vijay Janapa Reddi, Kim M. Hazelwood

Proceedings of the ACM SIGPLAN 2005 Conference on Programming Language Design and Implementation, 2005

2004

Pinpointing Representative Portions of Large Intel® Itanium® Programs with Dynamic Instrumentation.

Harish Patil, Robert S. Cohn, Mark Charney, Rajiv Kapoor, Andrew Sun, Anand Karunanidhi

Proceedings of the 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 2004

Ispike: A Post-link Optimizer for the Intel®Itanium®Architecture.

Chi-Keung Luk, Robert Muth, Harish Patil, Robert S. Cohn, P. Geoffrey Lowney

Proceedings of the 2nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2004), 2004

2002

Asim: A Performance Model Framework.

Joel S. Emer, Pritpal S. Ahuja, Eric Borch, Artur Klauser, Chi-Keung Luk, Srilatha Manne, Shubhendu S. Mukherjee, Harish Patil, Steven Wallace, Nathan L. Binkert, Roger Espasa, Toni Juan

Computer, 2002

Profile-guided post-link stride prefetching.

Chi-Keung Luk, Robert Muth, Harish Patil, Richard Weiss, P. Geoffrey Lowney, Robert S. Cohn

Proceedings of the 16th international conference on Supercomputing, 2002

2000

Combining Static and Dynamic Branch Prediction to Reduce Destructive Aliasing.

Harish Patil, Joel S. Emer

Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, 2000

1999

A New Framework for Debugging Globally Optimized Code.

Le-Chun Wu, Rajiv Mirani, Harish Patil, Bruce Olsen, Wen-mei W. Hwu

Proceedings of the 1999 ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), 1999

1997

Low-Cost, Concurrent Checking of Pointer and Array Accesses in C Programs.

Harish Patil, Charles N. Fischer

Softw. Pract. Exp., 1997

1996

Efficient program monitoring techniques.

Harish Patil

PhD thesis, 1996

1995

Efficient Run-time Monitoring Using Shadow Processing.

Harish Patil, Charles N. Fischer

Proceedings of the Second International Workshop on Automated Debugging, 1995

1993

An Elimination Algorithm for Bidirectional Data Flow Problems Using Edge Placement.

Dhananjay M. Dhamdhere, Harish Patil

ACM Trans. Program. Lang. Syst., 1993