Kazuya Ishihara
According to our database1,
Kazuya Ishihara
authored at least 5 papers
between 1995 and 2010.
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Bibliography
2010
Dependable SRAM with enhanced read-/write-margins by fine-grained assist bias control for low-voltage operation.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010
2002
A 99-mm<sup>2</sup> 0.7-W single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mb embedded DRAM for portable 422P@HL encoder system.
IEEE J. Solid State Circuits, 2002
2001
A 99-mm<sup>2</sup>, 0.7-W, single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mbit embedded DRAM for portable 422P@HL encoder system.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001
1998
A 165-GOPS motion estimation processor with adaptive dual-array architecture for high quality video-encoding applications.
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998
1995
A half-pel precision MPEG2 motion-estimation processor with concurrent three-vector search.
IEEE J. Solid State Circuits, December, 1995