Hongzhi Liang

According to our database, Hongzhi Liang authored at least 30 papers between 2004 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

An 8-bit 5-GS/s Single-Channel Hybrid ADC With a λ/4 Transmission Line Based Time Quantizer.

Hongzhi Liang, Yi Shen, Jun Chang, Shubin Liu, Ruixue Ding, Zhangming Zhu

IEEE Trans. Circuits Syst. I Regul. Pap., September, 2025

A Real-Time Rotation Calibration for Interchannel Offset Mismatch in Time-Interleaved SAR ADCs.

Yixiao Luo, Hongzhi Liang, Zeyu Peng, Yukui Yu, Shubin Liu, Ruixue Ding, Zhangming Zhu

IEEE Trans. Very Large Scale Integr. Syst., March, 2025

A 12-bit 1.5-GS/s Single-Channel Pipelined SAR ADC With a Pipelined Residue Amplification Stage.

Yi Shen, Shubin Liu, Yue Cao, Haolin Han, Hongzhi Liang, Zhicheng Dong, Dengquan Li, Ruixue Ding, Zhangming Zhu

IEEE J. Solid State Circuits, January, 2025

A 10-bit 4 GS/s Pipelined-SAR ADC based on loop-unrolled and partial-interleaving.

Weimin Zhou, Zhe Li, Hongzhi Liang, Li Dang, Ruixue Ding, Shubin Liu, Zhangming Zhu

Microelectron. J., 2025

24.2 A 14b 1GS/s Single-Channel Pipelined ADC with A Parallel-Operation SAR Sub-Quantizer and A Dynamic-Deadzone Ring Amplifier.

Yue Cao, Yi Shen, Shubin Liu, Haolin Han, Hongzhi Liang, Li Dang, Dengquan Li, Ruixue Ding, Zhangming Zhu

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

A 13b 2GS/s Time-Domain Pipelined ADC with Split-CDAC Ping-Pong Residue Transfer and PVT-Robust Self-Tracked Time Amplifier.

Xin Zhao, Dengquan Li, Feida Wang, Depan Li, Yi Shen, Hongzhi Liang, Zhangming Zhu

Proceedings of the IEEE Custom Integrated Circuits Conference, 2025

A 32GS/s 8b 16× Time-Interleaved Hybrid ADC with Self-Detection Offset Calibration, DLL-Based TLSB PVT Variation Calibration and VTC Gain Self-Tracking.

Hongzhi Liang, Jun Chang, Yixiao Luo, Zeyu Peng, Weimin Zhou, Li Dang, Yue Cao, Haolin Han, Yi Shen, Shubin Liu, Ruixue Ding, Zhangming Zhu

Proceedings of the IEEE Custom Integrated Circuits Conference, 2025

A 100Gb/s Transmitter with Digital Pre-Distortion and MUX-Merged Voltage-Mode Driver Achieving 3-Times INLPP Improvement in 28nm CMOS.

Chenxi Han, Xiaoteng Zhao, Qi Zhang, Yuan Liu, Yuhao Zhang, Hongzhi Liang, Yukui Yu, Shubin Liu, Zhangming Zhu

Proceedings of the IEEE Custom Integrated Circuits Conference, 2025

A 0.7-V 26.2-28.5 GHz Dual-Loop Double-Sampling PLL with Floating Capacitor OTA Based Gm-CP Achieving a 45.4-fsRMS Jitter.

Jun Chang, Hongzhi Liang, Yixiao Luo, Zeyu Peng, Zhe Li, Yi Shen, Shubin Liu, Zhangming Zhu

Proceedings of the IEEE Custom Integrated Circuits Conference, 2025

2024

A 0.08%/V 32.3-ppm/°C 36.6-kHz Unregulated Current-Reuse Ring Oscillator With VGS-Ratio-Based Compensation Using One-Type-Only Resistor.

Zhicheng Dong, Shubin Liu, Xiaoteng Zhao, Baotian Hao, Xianting Su, Hongzhi Liang, Menghao Wang, Zhangming Zhu

IEEE J. Solid State Circuits, November, 2024

A Power-Efficient Clock Circuit and Output Serializing Technique Integrated in a 12-bit 10-GS/s ADC.

Haolin Han, Shubin Liu, Hongzhi Liang, Yi Shen, Jianyu Guo, Ruili Ren, Zhangming Zhu

IEEE Trans. Circuits Syst. I Regul. Pap., April, 2024

A 4-GS/s 6-Bit Single-Channel TDC-Assisted Hybrid ADC Featuring Power Supply Variation Adaptation for Inter-Stage Gain Error.

Hongzhi Liang, Shubin Liu, Ruixue Ding, Yi Shen, Dengquan Li, Zhangming Zhu

IEEE Trans. Circuits Syst. II Express Briefs, January, 2024

A 68.5 dB-SNDR, 12.4-fJ/conv.-step, 100-MS/s pipelined-SAR ADC with PVT-enhanced circuitry.

Haolin Han, Ruili Ren, Yi Shen, Ruixue Ding, Shubin Liu, Hongzhi Liang

Microelectron. J., 2024

A 10-GS/s 8-bit 2× time interleaved hybrid ADC with λ/4 reference T-Line sharing technique.

Zhangming Zhu, Jun Chang, Hongzhi Liang, Ruixue Ding, Shubin Liu

Sci. China Inf. Sci., 2024

A 56 Gb/s DAC-DSP-based transmitter with adaptive retiming clock optimization using inverse-PR-based PD achieving 8-UI converge time in 28-nm CMOS.

Shubin Liu, Chenxi Han, Xiaoteng Zhao, Yuhao Zhang, Shixin Li, Hongzhi Liang, Lihong Yang, Zhangming Zhu

Sci. China Inf. Sci., 2024

A wide load-range OTA using a digitally assisted compensating technique.

Haolin Han, Shubin Liu, Yi Shen, Hongzhi Liang, Yue Cao, Longjie Zhong, Zhangming Zhu

Sci. China Inf. Sci., 2024

2023

An All-Digital Background Calibration Technique for M-Channel Downsampling Time-Interleaved ADCs Based on Interpolation.

Chenxi Han, Shubin Liu, Yuhao Zhang, Lichen Feng, Hongzhi Liang, Zhangming Zhu

IEEE Trans. Circuits Syst. II Express Briefs, June, 2023

A 12b 1.5GS/s Single-Channel Pipelined SAR ADC with a Pipelined Residue Amplification Stage.

Yi Shen, Shubin Liu, Yue Cao, Haolin Han, Hongzhi Liang, Zhicheng Dong, Dengquan Li, Ruixue Ding, Zhangming Zhu

Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

A 0.012mm² 36.41kHz Temperature-insensitive Current-Reuse Ring Oscillator Achieving 0.077%/V Line Sensitivity across a 1.3V-to-3.7V unregulated Supply.

Zhicheng Dong, Shubin Liu, Xiaoteng Zhao, Baotian Hao, Hongzhi Liang, Haolin Han, Menghao Wang, Weijie Han, Zhangming Zhu

Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

A 5GS/s 38.04dB SNDR Single-Channel TDC-Assisted Hybrid ADC with $\lambda/4$ Transmission Line Based Time Quantizer Achieving a PVT Robustness 416.6fs Time Step.

Hongzhi Liang, Yi Shen, Jun Chang, Shubin Liu, Ruixue Ding, Zhangming Zhu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

2022

A 0.8-V, 2.55-GHz, 2.62-mW Charge-Pump PLL With High Spectrum Purity.

Lianxi Liu, Yaling Ji, Xufeng Liao, Zhenghe Qin, Hongzhi Liang

IEEE Trans. Very Large Scale Integr. Syst., 2022

A Power-Efficient TVC-Based Fast Auto-Frequency Calibration for PLLs.

Depeng Sun, Ruixue Ding, Feng Bu, Hongzhi Liang, Dengquan Li, Yuhua Liang, Shubin Liu

IEEE Trans. Circuits Syst. II Express Briefs, 2022

2018

Energy-Efficient and Area-Saving Asymmetric Capacitor Switching Scheme for SAR ADCs.

Hongzhi Liang, Ruixue Ding, Shubin Liu, Zhangming Zhu

J. Circuits Syst. Comput., 2018

2017

Analysis and optimal distribution scheme for SAR-VCO ADCs.

Ruixue Ding, Hongzhi Liang, Shubin Liu, Zhangming Zhu

Microelectron. J., 2017

2009

Sequence Diagrams Integration via Typed Graphs: Theory and Implementation.

Hongzhi Liang

PhD thesis, 2009

2008

A Practical Evaluation of Using TXL for Model Transformation.

Hongzhi Liang, Jürgen Dingel

Proceedings of the Software Language Engineering, First International Conference, 2008

A General Approach for Scenario Integration.

Hongzhi Liang, Zinovy Diskin, Jürgen Dingel, Ernesto Posse

Proceedings of the Model Driven Engineering Languages and Systems, 2008

2007

Scenario Integration via the Transformation and Manipulation of Higher-order Graphs.

Hongzhi Liang

Proceedings of the Doctoral Symposium at the ACM/IEEE 10th International Conference on Model-Driven Engineering Languages and Systems, 2007

2006

A comparative survey of scenario-based to state-based model synthesis approaches.

Hongzhi Liang, Jürgen Dingel, Zinovy Diskin

Proceedings of the SCESM '06: Proceedings of the 2006 International Workshop on Scenarios and State Machines: Models, 2006

2004

Automating comprehensive safety analysis of concurrent programs using verisoft and TXL.

Jürgen Dingel, Hongzhi Liang

Proceedings of the 12th ACM SIGSOFT International Symposium on Foundations of Software Engineering, 2004, Newport Beach, CA, USA, October 31, 2004