Hui Wang
Orcid: 0009-0004-6994-2618Affiliations:
- Chinese Academy of Sciences, Shanghai Advanced Research Institute, China
- Chinese Academy of Sciences, Institute of Semiconductors, Beijing, China (PhD 2001)
According to our database1,
Hui Wang authored at least 37 papers
between 2010 and 2026.
Collaborative distances:
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Bibliography
2026
A 50 μW/Gbps/Lane Power-Efficient MIPI D-PHY Receiver With Architecture-Level Adaptive and Structural Optimizations for Micro-Displays.
IEEE Trans. Circuits Syst. I Regul. Pap., May, 2026
A Complementary 3T-Based eDRAM Macro for High-Density Dual-Direction CAM and Logic-in-Memory.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2026
2025
An Energy-Efficient and Real-Time FPGA-Based Point Cloud Registration Framework with Ultra-Fast and Configurable Multi-Mode Correspondence Search.
ACM Trans. Reconfigurable Technol. Syst., December, 2025
IEEE Embed. Syst. Lett., December, 2025
Fast FPGA Accelerator of Graph Cut Algorithm With Threshold Global Relabel and Inertial Push.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2025
J. Signal Process. Syst., February, 2025
Accelerating Elliptic Curve Digital Signature Verification on FPGA for Secure Communication.
Proceedings of the Wireless Artificial Intelligent Computing Systems and Applications, 2025
2024
Flexible Thin Film Functionalized by Initiative Dust Removal and Anti-Fogging for Optical Device Applications.
Sensors, 2024
A multi-channel gamma voltage generator using transient-enhanced buffer for high-resolution LCoS driver IC.
IEICE Electron. Express, 2024
BTPA: Hardware-Software Co-Design for Bitwise Based Transformer with Parallelized Accelerator.
Proceedings of the 10th IEEE International Conference on High Performance and Smart Computing, 2024
2023
Fast FPGA Accelerator of Graph Cut Algorithm with Out-of-order Parallel Execution in Folding Grid Architecture.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
Ultra-Fast FPGA Implementation of Graph Cut Algorithm With Ripple Push and Early Termination.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Multiscale deep network based multistep prediction of high-dimensional time series from power transmission systems.
Trans. Emerg. Telecommun. Technol., 2022
Transformer anomaly detection based on time-frequency domain software-hardware cooperative analysis.
Trans. Emerg. Telecommun. Technol., 2022
2021
J. Signal Process. Syst., 2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
A 13-Bit, 12-ps Resolution Vernier Time-to-Digital Converter Based on Dual Delay-Rings for SPAD Image Sensor.
Sensors, 2021
SparkNoC: An energy-efficiency FPGA-based accelerator using optimized lightweight CNN for edge computing.
J. Syst. Archit., 2021
Proceedings of the 14th IEEE International Conference on ASIC, 2021
Proceedings of the 14th IEEE International Conference on ASIC, 2021
2020
Anomaly Detection Based on RBM-LSTM Neural Network for CPS in Advanced Driver Assistance System.
ACM Trans. Cyber Phys. Syst., 2020
2019
Designing efficient accelerator of depthwise separable convolutional neural network on FPGA.
J. Syst. Archit., 2019
2018
J. Circuits Syst. Comput., 2018
Correlation Coefficient Based Cluster Data Preprocessing and LSTM Prediction Model for Time Series Data in Large Aircraft Test Flights.
Proceedings of the Smart Computing and Communication - Third International Conference, 2018
2017
A Vector-Quantization Compression Circuit With On-Chip Learning Ability for High-Speed Image Sensor.
IEEE Access, 2017
2015
IEICE Electron. Express, 2015
A novel current-biased voltage-programmed pixel circuit with low temperature polycrystalline silicon thin film transistors for AMOLED.
IEICE Electron. Express, 2015
A 21.4 pW/frame-pixel PWM image sensor with sub-threshold leakage reduction and two-step readout.
IEICE Electron. Express, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
A quenching-and-reset circuit with programmable hold-off time for single photon avalanche diodes in 0.18μm CMOS.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
An area-efficient 10-bit two-stage DAC for active matrix organic light-emitting diodes display drivers.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
2013
A low-power reconfigurable GFSK RF transceiver with sub-1GHz band for short range applications.
Proceedings of the 20th IEEE International Conference on Electronics, 2013
A power-constrained contrast enhancement algorithm for AMOLED display using histogram segmentation.
Proceedings of the IEEE 10th International Conference on ASIC, 2013
Proceedings of the IEEE 10th International Conference on ASIC, 2013
Proceedings of the IEEE 10th International Conference on ASIC, 2013
2010
Revealing Feasibility of FMM on ASIC: Efficient Implementation of N-Body Problem on FPGA.
Proceedings of the 13th IEEE International Conference on Computational Science and Engineering, 2010