Ikkyun Jo

According to our database1, Ikkyun Jo authored at least 11 papers between 2013 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
4.3 A 43mm<sup>2</sup> Fully Integrated Legacy Cellular and 5G FR1 RF Transceiver with 24RX/3TX Supporting Inter-Band 7CA/5CA 4×4 MIMO with 1K-QAM.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2021
6.1 A Low-Power and Low-Cost 14nm FinFET RFIC Supporting Legacy Cellular and 5G FR1.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2017
A 14-nm 0.14-ps<sub>rms</sub> Fractional-N Digital PLL With a 0.2-ps Resolution ADC-Assisted Coarse/Fine-Conversion Chopping TDC and TDC Nonlinearity Calibration.
IEEE J. Solid State Circuits, 2017

24.8 A 14nm fractional-N digital PLL with 0.14psrms jitter and -78dBc fractional spur for cellular RFICs.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2016
A Design of 0.7-V 400-MHz All-Digital Phase-Locked Loop for Implantable Biomedical Devices.
IEICE Trans. Electron., 2016

An offset distribution modification technique of stochastic flash ADC.
IEICE Electron. Express, 2016

2015
RF front-end architecture for a triple-band CMOS GPS receiver.
Microelectron. J., 2015

A Design of 0.7-V 400-MHz Digitally-Controlled Oscillator.
IEICE Trans. Electron., 2015

A low-power CMOS programmable frequency divider with novel retiming scheme.
IEICE Electron. Express, 2015

A low-voltage design of controller-based ADPLL for implantable biomedical devices.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

2013
Design of triple-band CMOS GPS receiver RF front-end.
IEICE Electron. Express, 2013


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