Yongrong Zuo
According to our database1,
Yongrong Zuo
authored at least 6 papers
between 2016 and 2019.
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Bibliography
2019
A 28-nm 75-fs<sub>rms</sub> Analog Fractional- $N$ Sampling PLL With a Highly Linear DTC Incorporating Background DTC Gain Calibration and Reference Clock Duty Cycle Correction.
IEEE J. Solid State Circuits, 2019
A Sub-6-GHz 5G New Radio RF Transceiver Supporting EN-DC With 3.15-Gb/s DL and 1.27-Gb/s UL in 14-nm FinFET CMOS.
IEEE J. Solid State Circuits, 2019
A Sub-6GHz 5G New Radio RF Transceiver Supporting EN-DC with 3.15Gb/s DL and 1.27Gb/s UL in 14nm FinFET CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2017
A 14-nm 0.14-ps<sub>rms</sub> Fractional-N Digital PLL With a 0.2-ps Resolution ADC-Assisted Coarse/Fine-Conversion Chopping TDC and TDC Nonlinearity Calibration.
IEEE J. Solid State Circuits, 2017
24.8 A 14nm fractional-N digital PLL with 0.14psrms jitter and -78dBc fractional spur for cellular RFICs.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2016
IEEE J. Solid State Circuits, 2016