Kourosh Gharachorloo

According to our database1, Kourosh Gharachorloo authored at least 34 papers between 1988 and 2006.

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Bibliography

2006
ReViveI/O: efficient handling of I/O in highly-available rollback-recovery servers.
Proceedings of the 12th International Symposium on High-Performance Computer Architecture, 2006

2001
Code layout optimizations for transaction processing workloads.
Proceedings of the 28th Annual International Symposium on Computer Architecture, 2001

2000
Piranha: a scalable architecture based on single-chip multiprocessing.
Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000

Impact of Chip-Level Integration on Performance of OLTP Workloads.
Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, 2000

Architecture and design of AlphaServer GS320.
Proceedings of the ASPLOS-IX Proceedings of the 9th International Conference on Architectural Support for Programming Languages and Operating Systems, 2000

1999
Comparative Evaluation of Fine- and Coarse-Grain Approaches for Software Distributed Shared Memory.
Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, 1999

1998
Flexible Use of Memory for Replication/Migration in Cache-Coherent DSM Multiprocessors.
Proceedings of the 25th Annual International Symposium on Computer Architecture, 1998

An Analysis of Database Workload Performance on Simultaneous Multithreaded Processors.
Proceedings of the 25th Annual International Symposium on Computer Architecture, 1998

The Stanford FLASH Multiprocessor.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

Retrospective: Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

Memory System Characterization of Commercial Workloads.
Proceedings of the 25th Annual International Symposium on Computer Architecture, 1998

Fine-Grain Software Distributed Shared Memory on SMP Clusters.
Proceedings of the Fourth International Symposium on High-Performance Computer Architecture, Las Vegas, Nevada, USA, January 31, 1998

Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors.
Proceedings of the ASPLOS-VIII Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, 1998

1997
Towards Transparent and Efficient Software Distributed Shared Memory.
Proceedings of the Sixteenth ACM Symposium on Operating System Principles, 1997

Shasta: A System for Supporting Fine-Grain Shared Memory Across Clusters.
Proceedings of the Eighth SIAM Conference on Parallel Processing for Scientific Computing, 1997

Coherent Block Data Transfer in the FLASH Multiprocessor.
Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997

Design and Performance of the Shasta Distributed Shared Memory Protocol.
Proceedings of the 11th international conference on Supercomputing, 1997

1996
Shared Memory Consistency Models: A Tutorial.
Computer, 1996

Shasta: A Low Overhead, Software-Only Approach for Supporting Fine-Grain Shared Memory.
Proceedings of the ASPLOS-VII Proceedings, 1996

1994
Performance evaluation of hybrid hardware and software distributed shared memory protocols.
Proceedings of the 8th international conference on Supercomputing, 1994

The Performance Impact of Flexibility in the Stanford FLASH Multiprocessor.
Proceedings of the ASPLOS-VI Proceedings, 1994

Integration of Message Passing and Shared Memory in the Stanford FLASH Multiprocessor.
Proceedings of the ASPLOS-VI Proceedings, 1994

1992
Programming for Different Memory Consistency Models.
J. Parallel Distributed Comput., 1992

The Stanford Dash Multiprocessor.
Computer, 1992

Hiding Memory Latency using Dynamic Scheduling in Shared-Memory Multiprocessors.
Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992

1991
Proving Sequential Consistency of High-Performance Shared Memories (Extended Abstract).
Proceedings of the 3rd Annual ACM Symposium on Parallel Algorithms and Architectures, 1991

Detecting Violations of Sequential Consistency.
Proceedings of the 3rd Annual ACM Symposium on Parallel Algorithms and Architectures, 1991

Comparative Evaluation of Latency Reducing and Tolerating Techniques.
Proceedings of the 18th Annual International Symposium on Computer Architecture. Toronto, 1991

Two Techniques to Enhance the Performance of Memory Consistency Models.
Proceedings of the International Conference on Parallel Processing, 1991

Performance Evaluation of Memory Consistency Models for Shared Memory Multiprocessors.
Proceedings of the ASPLOS-IV Proceedings, 1991

1990
The Directory-Based Cache Coherence Protocol for the DASH Multiprocessor.
Proceedings of the 17th Annual International Symposium on Computer Architecture, 1990

Design of scalable shared-memory multiprocessors: the DASH approach.
Proceedings of the Intellectual Leverage: Thirty-Fifth IEEE Computer Society International Conference, 1990

1988
A Simple and Efficient Implmentation Approach for Single Assignment Languages.
Proceedings of the 1988 ACM Conference on LISP and Functional Programming, 1988


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