Joseph Melber

Orcid: 0000-0001-9519-0502

According to our database1, Joseph Melber authored at least 10 papers between 2016 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
From Loop Nests to Silicon: Mapping AI Workloads onto AMD NPUs with MLIR-AIR.
ACM Trans. Reconfigurable Technol. Syst., June, 2026

Striking the Balance: GEMM Performance Optimization Across Generations of Ryzen™ AI NPUs.
Proceedings of the 2026 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2026

STEEL: Sparsity-Aware Fused Attention for Energy-Efficient Long-Sequence Inference on AMD's XDNA™ NPU.
Proceedings of the 34th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2026

2025
Striking the Balance: GEMM Performance Optimization Across Generations of Ryzen AI NPUs.
CoRR, December, 2025

Can Asymmetric Tile Buffering Be Beneficial?
CoRR, November, 2025

Efficiency, Expressivity, and Extensibility in a Close-to-Metal NPU Programming Interface.
Proceedings of the 33rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2025

2023
Exploiting the Common Case When Accelerating Input-Dependent Stream Processing by FPGA.
IEEE Trans. Computers, May, 2023

SPARTA: Spatial Acceleration for Efficient and Scalable Horizontal Diffusion Weather Stencil Computation.
Proceedings of the 37th International Conference on Supercomputing, 2023

2020
A Service-Oriented Memory Architecture for FPGA Computing.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

2016
A Study of Pointer-Chasing Performance on Shared-Memory Processor-FPGA Systems.
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016


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