Kai-Hsin Chuang

Orcid: 0000-0002-5834-2324

According to our database1, Kai-Hsin Chuang authored at least 6 papers between 2018 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2020
The Influence of Gate Bias on the Anneal of Hot-Carrier Degradation.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019
A Physically Unclonable Function Using Soft Oxide Breakdown Featuring 0% Native BER and 51.8 fJ/bit in 40-nm CMOS.
IEEE J. Solid State Circuits, 2019

2018
A Cautionary Note When Looking for a Truly Reconfigurable Resistive RAM PUF.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018

A multi-bit/cell PUF using analog breakdown positions in CMOS.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

Self-heating-aware CMOS reliability characterization using degradation maps.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

A Physically Unclonable Function with 0% BER Using Soft Oxide Breakdown in 40nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018


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