Ben Kaczer

According to our database1, Ben Kaczer authored at least 94 papers between 2002 and 2022.

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2022
Insight to Data Retention loss in ferroelectric Hf0.5Zr0.5O2 pFET and nFET from simultaneous PV and IV measurements.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Simulation Comparison of Hot-Carrier Degradation in Nanowire, Nanosheet and Forksheet FETs.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

Understanding and Modeling Opposite Impacts of Self-Heating on Hot-Carrier Degradation in n- and p-Channel Transistors.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

On Superior Hot Carrier Robustness of Dynamically-Doped Field-Effect-Transistors.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

Trap-polarization interaction during low-field trap characterization on hafnia-based ferroelectric gatestacks.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

Modelling ultra-fast threshold voltage instabilities in Hf-based ferroelectrics.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

Significant Enhancement of HCD and TDDB in CMOS FETs by Mechanical Stress.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

Temperature Dependent Mismatch and Variability in a Cryo-CMOS Array with 30k Transistors.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

A Ring-Oscillator-Based Degradation Monitor Concept with Tamper Detection Capability.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

Evaluating Forksheet FET Reliability Concerns by Experimental Comparison with Co-integrated Nanosheets.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

Bias Temperature Instability (BTI) of High-Voltage Devices for Memory Periphery.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

Analysis of BTI in 300 mm integrated dual-gate WS2 FETs.
Proceedings of the Device Research Conference, 2022

2021
A BSIM-Based Predictive Hot-Carrier Aging Compact Model.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

Physics-based device aging modelling framework for accurate circuit reliability assessment.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

The properties, effect and extraction of localized defect profiles from degraded FET characteristics.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

CV Stretch-Out Correction after Bias Temperature Stress: Work-Function Dependence of Donor-/Acceptor-Like Traps, Fixed Charges, and Fast States.
Proceedings of the IEEE International Reliability Physics Symposium, 2021

Novel low thermal budget gate stack solutions for BTI reliability in future Logic Device technologies : Invited paper.
Proceedings of the International Conference on IC Design and Technology, 2021

2020
The Influence of Gate Bias on the Anneal of Hot-Carrier Degradation.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

A Compact Physics Analytical Model for Hot-Carrier Degradation.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

Exploring the DC reliability metrics for scaled GaN-on-Si devices targeted for RF/5G applications.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

Fast & Accurate Methodology for Aging Incorporation in Circuits using Adaptive Waveform Splitting (AWS).
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

Quantum Mechanical Charge Trap Modeling to Explain BTI at Cryogenic Temperatures.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

On the impact of mechanical stress on gate oxide trapping.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

Reliability and Variability of Advanced CMOS Devices at Cryogenic Temperatures.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

The Mysterious Bipolar Bias Temperature Stress from the Perspective of Gate-Sided Hydrogen Release.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

Relevance of fin dimensions and high-pressure anneals on hot-carrier degradation.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019
Understanding the Impact of Time-Dependent Random Variability on Analog ICs: From Single Transistor Measurements to Circuit Simulations.
IEEE Trans. Very Large Scale Integr. Syst., 2019

A Physically Unclonable Function Using Soft Oxide Breakdown Featuring 0% Native BER and 51.8 fJ/bit in 40-nm CMOS.
IEEE J. Solid State Circuits, 2019

Accelerated Capture and Emission (ACE) Measurement Pattern for Efficient BTI Characterization and Modeling.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

Full (V<sub>g</sub>, V<sub>d</sub>) Bias Space Modeling of Hot-Carrier Degradation in Nanowire FETs.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

Gate-Stack Engineered NBTI Improvements in Highvoltage Logic-For-Memory High-ĸ/Metal Gate Devices.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

Modeling the Effect of Random Dopants on Hot-Carrier Degradation in FinFETs.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

New Insights into the Imprint Effect in FE-HfO2 and its Recovery.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

CDM-Time Domain Turn-on Transient of ESD Diodes in Bulk FinFET and GAA NW Technologies.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

Array-Based Statistical Characterization of CMOS Degradation Modes and Modeling of the Time-Dependent Variability Induced by Different Stress Patterns in the {V<sub>G</sub>, V<sub>D</sub>} bias space.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

Stochastic Modeling of Hot-Carrier Degradation in nFinFETs Considering the Impact of Random Traps and Random Dopants.
Proceedings of the 49th European Solid-State Device Research Conference, 2019

2018
Comphy - A compact-physics framework for unified modeling of BTI.
Microelectron. Reliab., 2018

A brief overview of gate oxide defect properties and their relation to MOSFET instabilities and device and circuit time-dependent variability.
Microelectron. Reliab., 2018

Impact of slow and fast oxide traps on In0.53Ga0.47As device operation studied using CET maps.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

Characterization and physical modeling of the temporal evolution of near-interfacial states resulting from NBTI/PBTI stress in nMOS/pMOS transistors.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

Hot electron and hot hole induced degradation of SiGe p-FinFETs studied by degradation maps in the entire bias space.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

Investigation of the endurance of FE-HfO2 devices by means of TDDB studies.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

A multi-bit/cell PUF using analog breakdown positions in CMOS.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

Self-heating-aware CMOS reliability characterization using degradation maps.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

Experimental extraction of BEOL composite equivalent thermal conductivities for application in self-heating simulations.
Proceedings of the 48th European Solid-State Device Research Conference, 2018

A Physically Unclonable Function with 0% BER Using Soft Oxide Breakdown in 40nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2016
Capturing True Workload Dependency of BTI-induced Degradation in CPU Components.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

A drift-diffusion-based analytic description of the energy distribution function for hot-carrier degradation in decananometer nMOSFETs.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

Probing defects generation during stress in high-κ/metal gate FinFETs by random telegraph noise characterization.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

Analysis of NBTI effects on high frequency digital circuits.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Comparison of NBTI aging on adder architectures and ring oscillators in the downscaling technology nodes.
Microprocess. Microsystems, 2015

Characterization and modeling of reliability issues in nanoscale devices.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Characterization of time-dependent variability using 32k transistor arrays in an advanced HK/MG technology.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

Origins and implications of increased channel hot carrier variability in nFinFETs.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

ESD characterization of planar InGaAs devices.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

On the volatility of oxide defects: Activation, deactivation, and transformation.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

NBTI in Si0.55Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

Time dependent variability in RMG-HKMG FinFETs: Impact of extraction scheme on stochastic NBTI.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

Impact of time-dependent variability on the yield and performance of 6T SRAM cells in an advanced HK/MG technology.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

Impact of random telegraph noise on ring oscillators evaluated by circuit-level simulations.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

Off-state stress degradation mechanism on advanced p-MOSFETs.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

The defect-centric perspective of device and circuit reliability - From individual defects to circuits.
Proceedings of the 45th European Solid State Device Research Conference, 2015

Statistical simulations of 6T-SRAM cell ageing using a reliability aware simulation flow.
Proceedings of the 45th European Solid State Device Research Conference, 2015

Experimental evidences and simulations of trap generation along a percolation path.
Proceedings of the 45th European Solid State Device Research Conference, 2015

Characterization and simulation methodology for time-dependent variability in advanced technologies.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014
Use of SSTA Tools for Evaluating BTI Impact on Combinational Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Energy distribution of positive charges in high-k dielectric.
Microelectron. Reliab., 2014

Circuit simulation of workload-dependent RTN and BTI based on trap kinetics.
Microelectron. Reliab., 2014

On reliability enhancement using adaptive core voltage scaling and variations on nanoscale FPGAs.
Proceedings of the 15th Latin American Test Workshop, 2014

Degradation analysis of datapath logic subblocks under NBTI aging in FinFET technology.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

Characterization and modeling of charge trapping: From single defects to devices.
Proceedings of the 2014 IEEE International Conference on IC Design & Technology, 2014

Impact of Off State Stress on advanced high-K metal gate NMOSFETs.
Proceedings of the 44th European Solid State Device Research Conference, 2014

NBTI Aging on 32-Bit Adders in the Downscaling Planar FET Technology Nodes.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

Bias Temperature Instability analysis of FinFET based SRAM cells.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
Impact of duty factor, stress stimuli, gate and drive strength on gate delay degradation with an atomistic trap-based BTI model.
Microprocess. Microsystems, 2013

2012
Buried Silicon-Germanium pMOSFETs: Experimental Analysis in VLSI Logic Circuits Under Aggressive Voltage Scaling.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Defect-centric perspective of time-dependent BTI variability.
Microelectron. Reliab., 2012

BTI reliability of ultra-thin EOT MOSFETs for sub-threshold logic.
Microelectron. Reliab., 2012

Superior reliability and reduced Time-Dependent variability in high-mobility SiGe channel pMOSFETs for VLSI logic applications.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012

Impact of Duty Factor, Stress Stimuli, and Gate Drive Strength on Gate Delay Degradation with an Atomistic Trap-Based BTI Model.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

2011
Understanding the Potential and the Limits of Germanium pMOSFETs for VLSI Circuits From Experimental Measurements.
IEEE Trans. Very Large Scale Integr. Syst., 2011

Experimental analysis of buried SiGe pMOSFETs from the perspective of aggressive voltage scaling.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
Experimental study of leakage-delay trade-off in Germanium pMOSFETs for logic circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A CMOS circuit for evaluating the NBTI over a wide frequency range.
Microelectron. Reliab., 2009

2008
Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies.
Proceedings of the Design, Automation and Test in Europe, 2008

2007
NBTI reliability of Ni FUSI/HfSiON gates: Effect of silicide phase.
Microelectron. Reliab., 2007

Gate oxide breakdown in FET devices and circuits: From nanoscale physics to system-level reliability.
Microelectron. Reliab., 2007

2006
FinFET and MOSFET preliminary comparison of gate oxide reliability.
Microelectron. Reliab., 2006

Reliability issues in deep deep sub-micron technologies: time-dependent variability and its impact on embedded system design.
Proceedings of the IFIP VLSI-SoC 2006, 2006

2005
Progressive breakdown in ultrathin SiON dielectrics and its effect on transistor performance.
Microelectron. Reliab., 2005

2003
A new method for the analysis of high-resolution SILC data.
Microelectron. Reliab., 2003

2002
Analysis and modeling of a digital CMOS circuit operation and reliability after gate oxide breakdown: a case study.
Microelectron. Reliab., 2002

High-resolution SILC measurements of thin SiO<sub>2</sub> at ultra low voltages.
Microelectron. Reliab., 2002


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