Kazuo Ono
According to our database1,
Kazuo Ono
authored at least 8 papers
between 2009 and 2025.
Collaborative distances:
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Bibliography
2025
Annealing Machine-assisted Learning of Graph Neural Network for Combinatorial Optimization.
CoRR, January, 2025
2016
A low 1/f-noise accelerometer frontend using chopper stabilization at a frequency matched with a notch of quantization noise.
Proceedings of the 2016 IEEE SENSORS, Orlando, FL, USA, October 30 - November 3, 2016, 2016
A concentrated springs architecture for single-digit frequency symmetry in Si MEMS gyroscope.
Proceedings of the 2016 IEEE SENSORS, Orlando, FL, USA, October 30 - November 3, 2016, 2016
2012
Fluctuation Tolerant Charge-Integration Read Scheme for Ultrafast DNA Sequencing with Nanopore Device.
IEICE Trans. Electron., 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2011
1-Tbyte/s 1-Gbit DRAM Architecture Using 3-D Interconnect for High-Throughput Computing.
IEEE J. Solid State Circuits, 2011
2010
A 32-Mb SPRAM With 2T1R Memory Cell, Localized Bi-Directional Write Driver and '1'/'0' Dual-Array Equalized Reference Scheme.
IEEE J. Solid State Circuits, 2010
2009
IEICE Electron. Express, 2009