Kevin K. Chang

According to our database¹, Kevin K. Chang authored at least 20 papers between 2005 and 2018.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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On csauthors.net:

Bibliography

2018

What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study.

[BibT_eX]

[DOI]

Saugata Ghose

Abdullah Giray Yaglikçi

Proc. ACM Meas. Anal. Comput. Syst., 2018

SoftMC: Practical DRAM Characterization Using an FPGA-Based Infrastructure.

[BibT_eX]

[DOI]

CoRR, 2018

LISA: Increasing Internal Connectivity in DRAM for Fast Data Movement and Low Latency.

[BibT_eX]

[DOI]

CoRR, 2018

Voltron: Understanding and Exploiting the Voltage-Latency-Reliability Trade-Offs in Modern DRAM Chips to Improve Energy Efficiency.

[BibT_eX]

[DOI]

Kevin K. Chang

Abdullah Giray Yaglikçi

CoRR, 2018

Flexible-Latency DRAM: Understanding and Exploiting Latency Variation in Modern DRAM Chips.

[BibT_eX]

[DOI]

CoRR, 2018

Adaptive-Latency DRAM: Reducing DRAM Latency by Exploiting Timing Margins.

[BibT_eX]

[DOI]

CoRR, 2018

Reducing DRAM Refresh Overheads with Refresh-Access Parallelism.

[BibT_eX]

[DOI]

CoRR, 2018

High-Performance and Energy-Effcient Memory Scheduler Design for Heterogeneous Systems.

[BibT_eX]

[DOI]

Rachata Ausavarungnirun

CoRR, 2018

2017

Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms.

[BibT_eX]

[DOI]

Kevin K. Chang

Abdullah Giray Yaglikçi

Proc. ACM Meas. Anal. Comput. Syst., 2017

Understanding and Improving the Latency of DRAM-Based Memory Systems.

[BibT_eX]

[DOI]

Kevin K. Chang

CoRR, 2017

Improving DRAM Performance by Parallelizing Refreshes with Accesses.

[BibT_eX]

[DOI]

CoRR, 2017

Understanding Reduced-Voltage Operation in Modern DRAM Chips: Characterization, Analysis, and Mechanisms.

[BibT_eX]

[DOI]

Kevin K. Chang

Abdullah Giray Yaglikçi

CoRR, 2017

SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

2016

Understanding Latency Variation in Modern DRAM Chips: Experimental Characterization, Analysis, and Optimization.

[BibT_eX]

[DOI]

Proceedings of the 2016 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Science, 2016

Accelerating pointer chasing in 3D-stacked memory: Challenges, mechanisms, evaluation.

[BibT_eX]

[DOI]

Proceedings of the 34th IEEE International Conference on Computer Design, 2016

Low-Cost Inter-Linked Subarrays (LISA): Enabling fast inter-subarray data movement in DRAM.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

2006

Network System Challenges in Selective Sharing and Verification for Personal, Social, and Urban-Scale Sensing Applications.

[BibT_eX]

[DOI]

Proceedings of the 5th ACM Workshop on Hot Topics in Networks, 2006

2005

Sympathy for the sensor network debugger.

[BibT_eX]

[DOI]

Proceedings of the 3rd International Conference on Embedded Networked Sensor Systems, 2005

D.A.S.: deployment analysis system.

[BibT_eX]

[DOI]

Proceedings of the 3rd International Conference on Embedded Networked Sensor Systems, 2005

Language Support for Interoperable Messaging in Sensor Networks.

[BibT_eX]

[DOI]

Kevin K. Chang

David Gay

Proceedings of the 9th International Workshop on Software and Compilers for Embedded Systems, Dallas, Texas, USA, September 29, 2005

Kevin K. Chang

Timeline

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Links

On csauthors.net:

Bibliography

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